Fundamental flaw in transistor noise theory discovered

May 21, 2009
Fundamental flaw in transistor noise theory discovered
Pacemakers, like the implanted one shown in this image, are among the low-power devices that could be affected by new NIST findings about transistor noise. The findings indicate unforeseen problems could crop up as transistors grow smaller and run on less power, potentially impacting cell phones and laptops as well. Credit: Shutterstock; copyright Dario Sabljak

(PhysOrg.com) -- Chip manufacturers beware: There's a newfound flaw in our understanding of transistor noise, a phenomenon affecting the electronic on-off switch that makes computer circuits possible. According to the engineers at the National Institute of Standards and Technology who discovered the problem, it will soon stand in the way of creating more efficient, lower-powered devices like cell phones and pacemakers unless we solve it.

While exploring transistor behavior, the team found evidence that a widely accepted model explaining errors caused by electronic "noise" in the switches does not fit the facts. A transistor must be made from highly purified materials to function; defects in these materials, like rocks in a stream, can divert the flow of and cause the device to malfunction. This, in turn, makes it appear to fluctuate erratically between "on" and "off" states. For decades, the engineering community has largely accepted a theoretical model that identifies these defects and helps guide designers' efforts to mitigate them.

Those days are ending, says NIST's Jason Campbell, who has studied the fluctuations between on-off states in progressively smaller . The theory, known as the elastic tunneling model, predicts that as transistors shrink, the fluctuations should correspondingly increase in frequency.

However, Campbell's group at NIST has shown that even in nanometer-sized transistors, the fluctuation frequency remains the same. "This implies that the theory explaining the effect must be wrong," Campbell said. "The model was a good working theory when transistors were large, but our observations clearly indicate that it's incorrect at the smaller nanoscale regimes where industry is headed."

The findings have particular implications for the low-power transistors currently in demand in the latest high-tech consumer technology, such as laptop computers. Low-power transistors are coveted because using them on chips would allow devices to run longer on less power—think cell phones that can run for a week on a single charge or pacemakers that operate for a decade without changing the battery. But Campbell says that the fluctuations his group observed grow even more pronounced as the power decreased. "This is a real bottleneck in our development of transistors for low-power applications," he says. "We have to understand the problem before we can fix it—and troublingly, we don't know what's actually happening."

Campbell, who credits NIST colleague K.P. Cheung for first noticing the possibility of trouble with the theory, presented* some of the group's findings at an industry conference on May 19, 2009, in Austin, Texas. Researchers from the University of Maryland College Park and Rutgers University also contributed to the study.

More information: J.P. Campbell, L.C. Yu, K.P. Cheung, J. Qin, J.S. Suehle, A. Oates, K. Sheng. Large Random Telegraph Noise in Sub-Threshold Operation of Nano-scale nMOSFETs. 2009 IEEE International Conference on Integrated Circuit Design and Technology. Austin, Texas. May 19, 2009; and Random Telegraph Noise in Highly Scaled nMOSFETs. 2009 IEEE International Reliability Physics Symposium, Montreal, Canada, April 29, 2009.

Source: National Institute of Standards and Technology (news : web)

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User comments : 9

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ScientistAmauterEnthusiast
not rated yet May 21, 2009
Minor set back if any
For all we know the big chip makers ( you know who you are ) know this already and have a workaround.

Sciences new solution to everything: Carbon nanotube the s**t out of it! =]
Arikin
not rated yet May 21, 2009
That last paragraph says that the lower power level causes more noise. But, before that they said that smaller sizes down to nano don't cause more noise... So only the power level matters in the amount of noise?

If so... when you miniaturize add more of them to equate to the same power usage as the bigger one. Believe me in computing we ALWAYS want more computing power. Sort of like getting the computing power of 4 CPUs in the space of 1 CPU.
SMMAssociates
not rated yet May 22, 2009
Arikin:

Just IMHO, but the "more power" thing probably refers to more power used by each junction, not the total for the entire "chip".... And, I'm almost certain, this has nothing to do with "computing power"....
Vlasev
not rated yet May 22, 2009
Can this be related to the single electron interference?
Lower power, less electrons, maybe larger portion of them diverted trough this mysterious interference.
wiyosaya
not rated yet May 22, 2009
That last paragraph says that the lower power level causes more noise. But, before that they said that smaller sizes down to nano don't cause more noise... So only the power level matters in the amount of noise?

What they said was that the noise does not increase in frequency as devices shrink, and this is the nature of the difficulty with existing theory; they did not say that smaller sizes do not cause more noise. The "frequency" and the "amount" of noise are two different quantities. They do not say anything with regards to "amount" of noise - which is what it sounds like you are referring to.

Speculation: As the amount of power the device uses shrinks, something known as the "signal to noise ratio" could decrease. So if signal decreases and noise increases, it would become more difficult to pick out the "signal" from the "noise." What you are interested in is "signal" and if "noise" is so great that you cannot pick out the "signal" then the device becomes useless. "Signal" is what carries the useful information.

If so... when you miniaturize add more of them to equate to the same power usage as the bigger one. Believe me in computing we ALWAYS want more computing power. Sort of like getting the computing power of 4 CPUs in the space of 1 CPU.

What they are talking about is the electrical power the chip uses not the computing power of the chip. There is a difference there, too. Computing power is related to the number of computations the chip can make in a second. Electrical power is how many watts does the chip consume when making those computations.
Slotin
2.3 / 5 (3) May 23, 2009
I don't know, why they're expecting, smaller transistors will be of smaller noise. Noise is the result of particles, which are crossing boundaries of PN junction or whole transistor. And the surface of this junction doesn't change significantly, when the size of transistor goes down, because PN junction is of flat shape. Quantum fluctuations inside of transistor will always compensate mutually, so they cannot contribute to noise of the whole transistor significantly.

http://www.aether...oise.gif

Formal theory is one thing, good reason the other..
Slotin
3 / 5 (2) May 23, 2009
..Campbell says that the fluctuations his group observed grow even more pronounced as the power decreased...
The noise of rest state of transistor is more significant, then the noise of transistor in its opened state, because every transistor amplifies it's own noise too and the amplification factor goes down with power load.
sender
5 / 5 (1) May 24, 2009
reminds me of the problem non-blinking transistors solved
PPihkala
5 / 5 (1) May 25, 2009
Noise is the result of particles, which are crossing boundaries of PN junction or whole transistor. And the surface of this junction doesn't change significantly, when the size of transistor goes down, because PN junction is of flat shape.

You are way off here, just look at the title of this research, given at the end of article: 'Large Random Telegraph Noise in Sub-Threshold Operation of Nano-scale nMOSFETs'. MOSFETs do not use PN junction. They are charge based so that charge on the gate determines how much current can flow at the channel. This research tells that at the smallest levels theory used currently to predict FET behaviour is not valid. So they need to find a better theory that can agree with measurements to be able to confidently make even smaller FETs.
Alizee
Jun 07, 2009
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