Future radar imaging systems and 5G communication systems will generate improved resolution and provide higher data-transmission rates when operated at higher frequencies, but at the cost of increased power consumption. To reduce power consumption, increase performance, and lower costs, the European project INSIGHT (Integration of III-V Nanowire Semiconductors for Next Generation High Performance CMOS SOC Technologies) is aiming at developing III-V CMOS (complementary metal-oxide-semiconductor) technology. The six partners, including universities, research institutes and one company, are committed to establishing a manufacturable III-V CMOS technology on Si substrates, to reduce costs and to save scarce materials.
The INSIGHT mission is to develop complementary functionality in compound semiconductor material (III-V CMOS), supporting both analogue and digital functionality in the millimetre-wave frequency domain. III-V nanowires will be used to maintain electrostatic control, as the gate length is scaled for future technology nodes. The small nanowire cross-section further facilitates the integration onto Si substrates using nanotechnology. "The fabrication of high-performance III-V components on large Si substrates using CMOS compatible technologies opens a path for cost reduction of millimetre-wave key components with minimized usage of critical materials" says Lars-Erik Wernersson, Professor at Lund University and coordinator for INSIGHT. Lund University is coordinating this new European Horizon 2020 research project that has been funded with 4.3 million Euros over 36 months.
IBM foresees a growing need to push the limits of chip technology to meet the emerging demands of cognitive computers, Internet of Things and Cloud platforms, due to the enormous amount of data they are handling – 90% of which is unstructured. The new technology developed in INSIGHT offers a potential solution to scale chip technology beyond the 10 nm node as well as opening up a range of new application areas. Integrating III-V materials into Si CMOS can enable better logic circuits with a lower power consumption, and in addition can enable the realization of System-on-Chip (SoC) products taking full advantage of III-V's state-of-the-art RF/Analog metrics.
There is a growing need for performance enhancements of key components in the millimetre-wave frequency range and new consumer applications are demanding low costs. The new technology offers a potential solution, as it may provide both high-performance analogue and digital functionality on the same platform where the improved manufacturability allows production on larger wafers. The INSIGHT consortium addresses the technology need with the ambition to demonstrate circuits and systems by optimizing both material and device properties.
The introduction of III-V materials on silicon substrates by using nanowires is one of the most innovative heterogeneous integration approaches today. Fraunhofer IAF will bring in their III-V process and circuit design experience, and is interested in transferring the results and findings to next generation III-V device technologies.
The LETI participation in the INSIGHT project involves both the Silicon Component division and the Integrated Circuit & Embedded System division, ranging from materials to the circuit demonstration. The technology expands the LETI platform for smart devices and Internet of Things with the potential to squeeze multiple functions into a single die.
III-V CMOS technology may be particularly suited for millimetre-wave front-ends where it will be used to detect and generate signals for communication, radar and imaging. It is the goal of the INSIGHT consortium to develop key technologies for both the receivers and transmitters, while exploring the limits of the transistor geometry and layout.
Explore further: Imec demonstrates world's first III-V FinFET devices monolithically integrated on 300mm silicon wafers