Using the correct annealing temperature is key to making fast, non-volatile computer memory

August 2, 2012
The interface between a slow non-volatile memory, like the hard drive in this picture, and fast electronic memory is a key bottleneck to computer performance.

Computers often do not run as fast as they should because they are constantly transferring information between two kinds of memory: a fast, volatile memory connected to the CPU, and a slow, non-volatile memory that remembers data even when switched off. A universal memory that is fast, power-efficient and non-volatile would allow new designs that avoid this bottleneck. Hao Meng and co-workers at the A*STAR Data Storage Institute have now shed new light on how to manufacture such a memory.

The researchers explored a special class of universal memory called spin-transfer torque magnetic (MRAM). A spin-transfer torque MRAM typically comprises two magnetic films that are separated by an insulating layer. The resistance between the two films is low if the magnetization direction in each film is parallel, and high if it is anti-parallel. Information is stored in the relative magnetization between the two films, and read out by measuring resistance. The magnetization directions can be switched by applying spin torque to the films’ magnetic domains (using a spin polarized electric current).

High-temperature annealing is a key step in the manufacture of an MRAM cell. Annealing alters the crystal structure of the cell materials, which in turn changes the degree of magnetization and how the cell functions. In particular, the greater change in resistance between parallel and anti-parallel magnetizations, the better the memory will function. Previous studies have shown that this resistance change increases as the annealing temperature increases, but drops if the annealing temperature rises too much.

Meng and co-workers extended this analysis to other critical characteristics. They focused on a cell made with CoFeB magnetic films, which has a natural magnetization direction outside of the plane of the film. They found that the annealing temperature that yielded maximum resistance variation exceeded the temperature necessary for maximum thermal stability. This is critical information for design engineers, who must balance these two metrics against each other.

Meng and co-workers also found that the minimum current density necessary to change the film magnetization increased with annealing temperature. A lower current is desirable for practical cell operation. The current density could be lowered by reducing the thickness of the . However, lower thicknesses also produced an undesirable reduction in variation. By explicitly demonstrating the trade-offs necessary in the design of spin MRAMs, the data is expected to help engineers design the next generation of these promising devices.

Explore further: Renesas, Grandis to Collaborate on Development of 65 nm MRAM Employing Spin Torque Transfer

More information: Meng, H., Sbiaa, R., Wang, C. C., Lua, S. Y. H. & Akhtar, M. A. K. Annealing temperature window for tunneling magnetoresistance and spin torque switching in CoFeB/MgO/CoFeB perpendicular magnetic tunnel junctions. Journal of Applied Physics 110, 103915 (2011)

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3.7 / 5 (3) Aug 02, 2012
There are actually more than 2 steps in this hierarchy... You have your hard disk for permanent mass storage, your system RAM for running applications, then your processor RAM buffers (cache) that usually use much faster SRAM, then your processor registers that hold data being operated on... transfer has to occur across all of these levels before data can be manipulated by the processor, and each successive one is both smaller in capacity and faster in performance (and more expensive).
not rated yet Aug 03, 2012
Wonder what would be the price tag on 1GB of CPU registers memory?
1 / 5 (1) Aug 03, 2012
Registers are just SRAM, they are faster because they are on-chip and have dedicated data lines directly to the CPU (they don't share the bus with anything else, so you never have to wait to talk to them).

If you want 1GB of memory that acts like registers you would need something like 8 billion extra traces on the processor die... not feasible.
1 / 5 (1) Aug 03, 2012
1GB of single transistor (1T) SRAM on a shared bus would be feasible, SRAM is very expensive compared to DRAM, and much less dense due to the bistable latching mechanism it uses to hold it's contents without manual refresh cycles that DRAM requires... I tried to find examples of a 1GB chip and the closest I could find was 576mb (which is 72MB) that MoSys sells embedded in another IC... so a far cry from 1GB. Though there are rumors that the next nintendo console will use up to 256MB.

If you go to Mouser or other parts supplies and try to find SRAM chips most only let you filter for sizes up to 144mb/18MB...

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