Tasty new standards for systems-on-chips

Jun 18, 2010
Tasty new standards for systems-on-chips

(PhysOrg.com) -- European researchers have developed breakthrough standards that will let microchip designers integrate more complex circuits more easily. It will mean a faster design process, more energy and cost efficient microchips, and more sophisticated designs to meet complex tasks.

Advances in design that combine several processing elements onto a single chip have paved the way for better, smaller and more energy efficient devices capable of multiple applications.

But in recent years the complexity of these systems on a chip, sometimes known as ‘systems-on-chip’ (SoC) has begun to slow down development. Now European researchers have helped define breakthrough standards that will make SoC integration faster, and allow the development of more complex, powerful and versatile microchips.

Systems-on-chip typically roll all the components of a system - like a computer - together into a single package. The chip may contain digital, analogue, mixed signal and even functions, such as on a mobile phone or a GPS navigation device.

SoC design has advanced rapidly in recent years, but there is a problem.

Odd SoCs

Elements of a SoC often come from different intellectual property (IP) vendors. These vendors sell the rights to use their design for a particular chip. But often there are different physical interfaces in their designs, so systems integrators (SI) must first link interfaces together, which isn’t easy.

It is based on mapping very low-level information transfer, and can involve many protocols. It is a phenomenally complex task and it is getting worse as SoC design becomes more ambitious. It slows development, increases costs and arguably prevents SIs from attempting even more complex circuits.

USB for SoC

Enter the EU-funded SPRINT project, which developed technical standards that overcome this bottleneck. SPRINT worked to move SI from the so-called ‘register transactions’, to the ‘transaction layer model’ (TLM).

At the transaction level, the emphasis is more on the functionality of the data transfers - what data are transferred to and from what locations - and less on their actual implementation, that is, on the actual protocol used for data transfer.

It means that system elements from different suppliers will conform with standards that enable TLM. Designers no longer need to worry about registers; the standard takes care of them. Now designers can focus on the transactions that run through the registers.

It is a bit like moving from wiring a circuit yourself, to simply using a standard set of protocols to handle the information transfer.

The work has already had a powerful impact on SoC development. In special demonstrators developed by SPRINT, engineers were able to integrate individual circuits up to 20 times faster, and SoC design simulation was reported to be 500 times faster.

“Of course, these are laboratory tests - in the real world the picture is a little more complex,” warns Wido Kruijtzer of NXP Semiconductors, coordinator of the SPRINT project. “But it does reflect a very large efficiency gain for SoC design and systems integration.”

SPRINT also developed a lot of standard extensions for IP-XACT - an IP meta-data description standard. This meta-data XML schema creates a common and language-neutral way to describe IP, compatible with automated integration techniques and enabling integrators to use IP from multiple sources with IP-XACT enabled tools.

Next steps

From the start, the SPRINT team knew it would be a tough job requiring a concerted effort to create a set of rules that all players could adapt to, but it achieved the results through a coordinated effort across the industry.

OSCI (Open SystemC Initiative), the international standards body, has already adopted these new standards, and some of the SPRINT partners have integrated them into their product line. Meanwhile, SPRINT’s work on IP-XACT is being taken up by the Spirit Consortium that serves as the standardisation body for deploying IP into advanced design environments.

The new standards are expected to roll out rapidly, with major gains for the European semiconductor industry.

Now the SPRINT team is setting its sight on the next bottleneck. “SPRINT concentrated on the hardware layer between elements on the SoC design, but many of the partners are now talking about taking the work further, to look at the software standards for linking these different devices together,” concludes Kruijtzer.

Explore further: The brains behind the chip that works like a brain

More information: SPRINT project - www.sprint-project.net/

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