Smaller, cheaper cell phones possible

Jul 31, 2009

(PhysOrg.com) -- Ph.D. candidate Sataporn Pornpromlikit played a critical role in research at UC San Diego that made a big impact at a recent conference, and might provide manufacturers with the means for making cell phones both smaller and cheaper.

Pornpromlikit, who goes by the name Aui (pronounced way), was the lead author on the prize-winning paper, which was based on research carried out in the Power Amplifier Lab at UC San Diego's California Institute for Telecommunications and Information Technology (Calit2). The paper outlines a new method for integrating a cell phone's power amplifier on the same chip with the rest of its internal parts using standard CMOS technology.

CMOS, or , is a low-cost integrated circuit process technology that has been driving the communications industry for the last few decades. Although the majority of cell phone circuitry has been successfully integrated onto a single using CMOS, until recently the power amplifier -- the part of the device that amplifies the telephone signal -- needed a separate chip because of its high voltage requirement.

"Power amplifiers are among the most power-consuming components in the transceiver and need to be designed for the best power efficiency to maximize the cell phone's battery life," explains Aui. "They also need the best signal quality and to provide the required large output power.

"With the low breakdown voltage limit allowed by the advanced CMOS process," he adds, "the power efficiency suffers severely."

But his design solves the problem, Aui says, by distributing the required voltage equally among stacked transistors to allow for safe operation, even with the highest power output.

"With this paper, we show that it is possible to implement high-performance power amplifiers in CMOS technology while also exhibiting high comparable to those amplifiers implemented using expensive processes."
And when the manufacturer saves money, the reduced cost theoretically trickles down to the consumer.

Aui tested his integrated circuit design on Calit2's record-setting CalHPA testbed in the Power Amplifier Lab. His paper, titled "A 33-dBm 1.9-Ghz Silicon-on-Insulator CMOS Stacked-FET Power Amplifier," won second prize in the student paper competition at the joint annual meetings in Boston of the Radio Frequency conference (RFIC 2009) and the International Microwave Symposium (IMS 2009). His co-authors included UC San Diego post-doctoral associate Calogero Presti; Antonino Scuderi of STmicroelectronics; JinHo Jeong, who is now on the faculty at South Korea's Kwangwoon University; and Peter Asbeck, a professor of electrical and computer engineering in the Jacobs School.

Calling the prize a "come-from-behind victory," Calit2 staff researcher and director of the Power Amplifier Lab, Don Kimball, explains that "the odds were stacked against them as it was a stacked MOSFET design fraught with risk." MOSFET stands for Metal Oxide Semiconductor Field Effect Transistor, a type of field-effect transistor to amplify or switch electronic signals.

Aui hails from Bangkok and arrived at UC San Diego via MIT, where he earned his S.B. and M.Eng degrees. He adds: "We are currently further refining our design for better performance and improved long-term reliability. With a clever tweak, we hope this technique can eventually become a risk-free design topology for any type of ."

Provided by University of California - San Diego (news : web)

Explore further: Startup Seamless Devices launches from professor Peter Kinget's lab

add to favorites email to friend print save as pdf

Related Stories

Recommended for you

Underfire Uber ramps up rider safety

5 hours ago

Uber is ramping up driver background checks and other security measures worldwide after the smartphone-focused car-sharing service was banned in New Delhi following the alleged rape of a passenger.

US probe links NKorea to Sony hacking

6 hours ago

A U.S. official says federal investigators have now connected the Sony Pictures Entertainment Inc. hacking to North Korea and are expected to make an announcement in the near future.

Sony cancels NKorea parody film release after threats

6 hours ago

Hollywood studio Sony Pictures on Wednesday abruptly canceled the December 25 release date of "The Interview," a parody film which has angered North Korea and triggered chilling threats from hackers.

User comments : 0

Please sign in to add a comment. Registration is free, and takes less than a minute. Read more

Click here to reset your password.
Sign in to get notified via email when new comments are made.