Fully integrated silicon photonics platform in a multi-project wafer service

Mar 15, 2013
Fully integrated silicon photonics platform in a multi-project wafer service

Imec announced today the launch of its fully integrated silicon photonics platform through a cost-sharing Multi-Project Wafer (MPW) service via ePIXfab. The platform enables cost-effective R&D of silicon photonic ICs for high-performance optical transceivers (25Gb/s and beyond) and optical sensing and life science applications. The offered integrated components include low-loss waveguides, efficient grating couplers, high-speed silicon electro-optic modulators and high-speed germanium waveguide photo-detectors.

Since 2007, imec and its associated laboratory at Ghent University have been offering a platform for passive silicon photonic components via ePIXfab, for R&D under shared cost conditions. Now, imec extends its offering, using a standard 130nm CMOS toolset, with active components such as high-speed optical modulators and integrated germanium photo-detectors.

"Imec's Silicon Photonics platform provides robust performance and solutions to integrated photonics products in medical diagnostics, telecom and datacom industries. Companies can benefit from our silicon photonics capability through established standard cells, or explore the functionality of their own designs in MPW," stated Philippe Absil, program director at imec. "This Silicon Photonics MPW offer provides a cost-efficient solution, with state-of-the-art performance, design flexibility and superior CD and thickness control".

The first run opens for registration with tape-in on 9th of Oct 2013 and first devices will be out in May 2014. Support, registration and design kit access will be organized by Europractice IC service, in collaboration with world-wide MPW partners.

Imec's Si Photonics 200mm wafer offers extensive design flexibility and includes:

  • Tight within- thickness variation 3 < 2.5nm
  • 3-level patterning of 220nm top Si layer (193nm optical lithography)
  • poly-Si overlay and patterning (193nm optical lithography)
  • 3-level n-type implants and 3-level p-type implants in Si
  • Ge epitaxial growth on Si and p-type and n-type implants in Ge
  • Local NiSi contacts, Tungsten vias and Cu metal interconnects
  • Al bond pads
  • Validated cell library with fiber couplers, polarization rotators, highly efficient carrier depletion modulators and ultra-compact Ge waveguide photo-detectors with low dark current.
  • Design kit support for Ipkiss, PhoeniX and Mentor Graphics software

Explore further: MESA complex starts largest production series in its history

add to favorites email to friend print save as pdf

Related Stories

HELIOS makes silicon breakthrough

Mar 30, 2012

Researchers in Europe have succeeded in presenting an integrated tuneable transmitter on silicon - the first time this has ever happened. This results are an outcome of the HELIOS ('Photonics electronics functional ...

EPIC: Building the Perfect Chip

Feb 07, 2008

Three years ago a team from Bell Labs took on a very daunting challenge – put an optical networking system on a commercially manufactured silicon chip, load it with a smorgasbord of sophisticated opto-electronic devices ...

Recommended for you

DARPA seeks new positioning, navigation, timing solutions

4 hours ago

The Defense Advanced Research Projects Agency (DARPA), writing about GPS, said: "The military relies heavily on the Global Positioning System (GPS) for positioning, navigation, and timing (PNT), but GPS access is easily blocked by methods such as jamming. In addition, many environments in which our mil ...

Future US Navy: Robotic sub-hunters, deepsea pods

8 hours ago

The robotic revolution that transformed warfare in the skies will soon extend to the deep sea, with underwater spy "satellites," drone-launching pods on the ocean floor and unmanned ships hunting submarines.

Festo has BionicANTs communicating by the rules for tasks

20 hours ago

Germany-based automation company Festo, focused on technologies for tasks, turns to nature for inspiration, trying to take the cues from how nature performs tasks so efficiently. "Whether it's energy efficiency, ...

Intel in talks with Altera on tie-up

20 hours ago

US tech giant Intel is in talks with rival Altera on a tie-up to broaden the chipmaker's product line amid growth in Internet-connected devices, the Wall Street Journal reported Friday.

User comments : 0

Please sign in to add a comment. Registration is free, and takes less than a minute. Read more

Click here to reset your password.
Sign in to get notified via email when new comments are made.