Team develops a real-time photonic processor with picosecond latency for dynamic RF interference

Radar altimeters are the sole indicators of altitude above a terrain. Spectrally adjacent 5G cellular bands pose significant risks of jamming altimeters and impacting flight landing and takeoff. As wireless technology expands in frequency coverage and utilizes spatial multiplexing, similar detrimental radio-frequency (RF) interference becomes a pressing issue.

To address this interference, RF front ends with exceptionally low latency are crucial for industries like transportation, health care, and the military, where the timeliness of transmitted messages is critical. Future generations of wireless technologies will impose even more stringent latency requirements on RF front-ends due to increased data rate, carrier frequency, and user count.

Additionally, challenges arise from the physical movement of transceivers, resulting in time-variant mixing ratios between interference and signal-of-interest (SOI). This necessitates real-time adaptability in mobile wireless receivers to handle fluctuating interference, particularly when it carries safety-to-life critical information for navigation and autonomous driving, such as aircraft and ground vehicles.

In a new paper published in Light: Science & Applications, a team of scientists, led by Professor Paul Prucnal from Lightwave Lab, Department of Electrical and Computer Engineering, Princeton University, U.S., and co-workers have introduced a system-on-chip (SoC) that employs silicon photonics to tackle dynamic radio-frequency (RF) interference.

The heart of this technological leap lies in photonic integrated circuits (PICs), which can process broadband information by converting radio frequencies into optical frequencies. Unlike traditional analog RF components or digital electronics, PICs dramatically reduce latency through direct analog processing, a critical feature as wireless technologies progress towards higher frequencies.

However, integrating a complete system on a chip for microwave processing has faced challenges in design, control, and packaging. Current PICs typically require bulky external devices for signal analysis and control, leading to impractical size, weight, and power metrics for real-world deployment.

Addressing these challenges, the research introduces a compact, palm-sized standalone photonic device. This device integrates modulators, microring resonator (MRR) weight banks, and photodetectors on a single chip, significantly reducing processing latency to less than 15 picoseconds. In addition, a field-programmable gate array (FPGA) with integrated peripherals handles high-throughput statistical analysis and high-level blind source separation (BSS) algorithms. This setup enables real-time execution at a refresh rate of 305 Hz, a marked improvement over previous systems.

The research team successfully tested this device in two dynamic interference scenarios—mobile communications and radar altimeters. The results were encouraging, demonstrating error-free operation and maintaining signal-to-noise ratios over 15 dB. This breakthrough showcases the device's potential to address real-world interference challenges effectively.

This research marks a significant step forward in the development of photonic processors. It has pioneered the development of a PIC capable of real-time online learning and rapid adjustment of photonic weights. As the research progresses, enhancements in form factor, performance, and online adaptiveness are anticipated. These advancements will broaden the applicability of photonic processors to a range of demanding tasks, including model predictive control and neuromorphic computing.

The study marks a substantial step forward in the field of photonic signal processing, highlighting its potential in addressing complex, real-world challenges.