IBM to produce Micron's hybrid memory cube in debut of first commercial, 3D chip-making capability

December 5, 2011
Micron's Hybrid Memory Cube features a stack of individual chips connected by vertical pipelines or “vias,” shown above. IBM’s new 3-D manufacturing technology, used to connect the 3D micro structure, will be the foundation for commercial production of the new memory cube.

IBM (NYSE: IBM) and Micron Technology, Inc. announced today that Micron will begin production of a new memory device built using the first commercial CMOS manufacturing technology to employ through-silicon vias (TSVs). IBM's advanced TSV chip-making process enables Micron's Hybrid Memory Cube (HMC) to achieve speeds 15 times faster than today's technology.

IBM will present the details of its TSV manufacturing breakthrough at the IEEE International Electron Devices Meeting on December 5 in Washington, DC.

HMC parts will be manufactured at IBM's advanced semiconductor fab in East Fishkill, N.Y., using the company's 32nm, high-K metal gate .

HMC technology uses advanced TSVs — vertical conduits that electrically connect a stack of individual chips — to combine high-performance logic with Micron's state-of-the-art DRAM.  HMC delivers bandwidth and efficiencies a leap beyond current device capabilities.  HMC prototypes, for example, clock in with bandwidth of 128 gigabytes per second (GB/s). By comparison, current state-of-the-art devices deliver 12.8 GB/s. HMC also requires 70 percent less energy to transfer data while offering a small form factor — just 10 percent of the footprint of conventional memory.

HMC will enable a new generation of performance in applications ranging from large-scale networking and high-performance computing, to industrial automation and, eventually, consumer products.

 "This is a milestone in the industry move to 3D semiconductor manufacturing," said Subu Iyer, IBM Fellow. "The manufacturing process we are rolling out will have applications beyond memory, enabling other industry segments as well. In the next few years, 3D chip technology will make its way into consumer products, and we can expect to see drastic improvements in battery life and functionality of devices."

"HMC is a game changer, finally giving architects a flexible memory solution that scales bandwidth while addressing power efficiency," said Robert Feurle, Vice President of DRAM Marketing for Micron. "Through collaboration with IBM, Micron will provide the industry's most capable memory offering."

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not rated yet Dec 05, 2011
I am sure there were all number of very complicated technical challenges that needed to be solved for this to happen, but i still think I can echo the sentiments of many here: Finally, what took you so long?
not rated yet Dec 05, 2011
Two major problems needed to be overcome: heat generation and defects. It is relatively easy to bypass a defective cell in a memory chip, stack ten of them and your yield of working devices drops dramatically. Heating is fairly obvious. To remove heat from the chips in the middle of the stack, you have to transition four or five equally hot chips.
1 / 5 (1) Dec 05, 2011

When can I get a Terabyte of RAM? Not that I know what I'd use it for any time soon.
5 / 5 (1) Dec 05, 2011
I am sure there were all number of very complicated technical challenges that needed to be solved for this to happen, but i still think I can echo the sentiments of many here: Finally, what took you so long?

Perhaps it was all those complicated technical challenges? :)

Two major problems needed to be overcome: heat generation and defects

I'm sure they can still bypass defective cells and so I don't see why there would be a 'dramatic' decrease in yields.

And I don't think heat will be an issue as they're claiming "drastic improvements in battery life" and "addressing power efficiency". Use less power, generate less heat.

IBM has plenty smarts to address such concerns.
not rated yet Dec 06, 2011
@Nanobanano: To play future Tetris with never before seen graphics noticeable by your artificially enhanced vision dummy.

They didn't describe how did they achieve cooling though. I remember writing about IBM and 3M new types of adhesives to create 3D semiconductors, but I doubt those are already in use.

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