Hydra flash memory outperforms other top storage mediums

April 6, 2010 By Lisa Zyga feature
This figure shows how Hydra’s advantages, especially its multiple background units, compare favorably with other storage systems when emulating an online transaction processing system. Speed performance is measured in I/Os per second (IOPS). Image credit: Seong, et al. ©2010 IEEE.

(PhysOrg.com) -- Although today flash memory is primarily used as a removable storage medium, it's currently becoming more and more appealing for a wider variety of applications. Moving beyond memory cards and flash drives, flash memory solid-state disks (SSDs) are already beginning to replace the hard disk drives (HDDs) in mobile computing systems, such as tablets and notebook PCs. Taking another step in this direction, a team of researchers from Korea has recently integrated and tested several improvements into SSDs to create a new flash architecture called Hydra, whose performance has proven to be significantly better than several other storage mediums that the researchers examined.

In their study, researchers Yoon Jae Seong and coauthors from Seoul National University developed Hydra to take advantage of the parallelism of multiple chips. To do so, they used various design techniques that are well known in many areas of computing, but have not yet been extensively exploited in this type of . The researchers’ study will be published in an upcoming issue of IEEE Transactions on Computers.

“We believe that the Hydra architecture suggests an efficient way of exploiting parallelism inherent in multiple flash memory chips,” Seong told PhysOrg.com. “The effects of design techniques such as interleaving, write buffering and prioritized handling are comprehensively analyzed using a prototype implementation.”

As the researchers explain, Hydra helps to improve a few of the most troublesome shortcomings of NAND flash chips, which were designed primarily for bulk . NAND chips are organized into physical blocks, each of which contains many “pages.” While the pages can be read and programmed individually, erasing must be done at the block level (electrons erase the data in a “flash,” hence the name). Although this gives flash memory a faster access time than HDDs, it also means that, unlike HDDs, flash memory cannot directly overwrite existing data. In order to update data, flash must first erase the entire block and then reprogram each page in the block, which can be time-consuming. In addition, NAND flash is characterized by a slow bus, resulting in a slow transfer of data between the host and the memory.

Hydra attempts to minimize the effects of these problems with several strategies. First, Hydra arranges multiple NAND chips and buses into sets called “super-chips” to speed up the read and programming processes. As the researchers explain, memory operations are directed to a super-chip, which operates on a “super-block” (multiple blocks) and can span multiple “super-pages” (multiple pages). Thus, Hydra can operate on multiple chips simultaneously, which increases its speed. Similarly, four 40MB/s buses together can achieve a collective bandwidth of 160 MB/s, which meets or exceeds the maximum bandwidth of a typical host interface. The researchers also determined that multiple chips can hide the read latency that occurs during data transfer between pages, eliminating idle time.

Further, the researchers designed Hydra to have a prioritized structure of memory controllers, with a single high-priority unit that handles read requests from the host as quickly as possible, and multiple low-priority background units for other operations. If the high-priority unit needs to use a super-chip that is being used by a background unit, the high-priority unit can preempt the background unit as soon as possible. Having multiple background units also allows multiple super-chip operations to be performed in parallel, as long as they use different super-blocks. In addition, the researchers equipped Hydra with a volatile write buffering mechanism to ensure that these multiple flash memory chips are used as effectively as possible.

After implementing these new organizational features in a Hydra prototype, the researchers tested the SSD by comparing its performance to several other SSDs and HDDs. First, the researchers evaluated Hydra in a typical PC environment, where the memory was involved in tasks such as booting up Windows XP; loading applications such as Adobe Acrobat Reader, Microsoft Word, and the Mozilla internet browser; executing a variety of programs; performing a virus scan; and writing other files. The results showed that Hydra performed these tasks 80% faster than the best of five other disks that the researchers examined. In an evaluation of the same storage systems running an online transaction processing system, Hydra again outperformed the other systems in a similar way.

Further analysis showed which of Hydra’s strategies were most effective for multiple concurrent tasks. Overall, the results showed that Hydra’s additional low-priority background units proved to be the most effective enhancement.

Still, as Seong explained, SSDs face challenges, most notably cost and reliability.

“Especially, the reliability problem is getting worse as the geometry of NAND flash chips shrinks down further,” he said. “Higher density NAND chips are more vulnerable to bit-flipping errors, and have lower retention and endurance.”

Despite the challenges, the researchers hope that the insights from this study, along with the advantages of flash memory such as low power consumption and high shock resistance, will continue to make flash memory an appealing storage medium.

Explore further: Samsung Samples First 50-nanometer 16Gb NAND Flash for Solid State Disks

More information: Yoon Jae Seong, et al. “Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture.” IEEE Transactions on Computers. To be published. Doi:10.1109/TC.2010.63


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2 / 5 (1) Apr 06, 2010
Nice in-depth description of how the speed increase is achieved.

I can't wait until the capacity reaches terabytes. HDD's won't be standard much longer.
2.3 / 5 (4) Apr 06, 2010
On my computer I have 400000 files, totaling some 17 gigs. Out of these, my own are less than ten thousand files totalling maybe one gig. The rest come with the distro. (I used "install all", since skipping things only leads to not having something when you unexpectedly need it on the road!) This seems like a fairly average setup, especially when my terabyte HD is still 95%+ empty after the install.

Now, 300000 of the files (75%) have not been used in the last 30 days. (Probably most of them never.) This strongly suggests that I should use Hydra for maybe only 1 gig and only use the hard drive like it were a tape robot. The hard drive would only be on for a few times a week when I request an unusual file. This would save a lot of power.

A cache application would take care of backing up data to the HD and moving less frequently used files to the HD. The cache app should also be smart enough to not bring an infrequently used large file into Hydra.

Let's see when this comes standard!!
2.5 / 5 (2) Apr 06, 2010
Not to belittle the research but shipping Solid State Drives have been exceeding these numbers for some time.
I do understand there is a lag between performing the research and publishing it. But there have been drives publicly available besdies the Samsung Drive they are using to represent the best SSDs.


Hard to compare to the results directly though as I don't have / (have time to look for) the details about their test setup.

1.5 / 5 (2) Apr 06, 2010
Currently they have DDR3 RAM, what's the next RAM and when is it going to be released? I want to get that new intel 6core chip, but would like to get the next generation of RAM as well.
not rated yet Apr 08, 2010
Please explain why NAND flash needs to be erased before overwrite. Also, is flash limited to about 1e3 read/write cycles?
not rated yet Apr 10, 2010
how well does it stack up against the latest Sandforce controllers, they use smart-caching/ internal raiding too? I would like to see a comparison chart with Intel SSDs and Ocz Vertex Extreme edition for example, to give me a real world performance clue.
1 / 5 (2) Apr 12, 2010

The hard drive would only be on for a few times a week when I request an unusual file. This would save a lot of power.

2 to 4 watts 5400rpm hard drive..........
5 to 10 watts 7200rpm hard drive..........
5 to 15 watts 10000rpm hard drive..........

Nwatts times 24 hours a day yields N watt/hours. Avg cost of U.S. electricity, $.12/Kw

You have saved from $.00576 to $.0432 a day. 1/2 a cent to 4 and a 1/3 cents a day. 15 cents to a dollar twenty-nine a month. woot!
not rated yet Apr 15, 2010
Might make a significant difference with portable devices though.
not rated yet Apr 22, 2010
@out7x: I'm not as well versed on the EE side of Flash, but I believe the erase-before-write restriction is due to the physical bitline architecture. Another angle on this restriction is that in large-block NAND, pages can no longer be written randomly within the block; it must be done sequentially. In order to overwrite a specific physical page, the entire block must be erased. The limited lifetime of Flash is due to the programming method which a variation of electron tunneling. The process degrades the substrate over time and the gate can no longer reliably hold charge. The estimated lifetime for SLC is 100K cycles while MLC is estimated to be 10K cycles, though empirical evidence tends to show that actual lifetimes can be an order of magnitude longer.
not rated yet Apr 22, 2010
@Lord_jag: SSDs are already available in TB capacity though they are extremely expensive. At the 25nm node, individual NAND Flash chips should yield 64Gb MLC. It is extremely unlikely that Flash will scale beyond 25nm (and MLC beyond 2-bits is still unreliable) so the limiting factor in Flash-based SSD capacity will be form factor, i.e. how many Flash packages someone cares to fit into a drive chassis.
not rated yet Apr 22, 2010
After a skim, the paper doesn't seem to present anything that is really breakthrough. Channel parallelism and multiple memory controllers are things the industry has been using for some time now. I wonder if they are emphasizing the finer granularity of interleaving.

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