Samsung Announces First Validated 40-nanometer Class DRAM

Feb 05, 2009

Samsung Electronics announced today that it has developed and validated the first 40-nanometer (nm) class DRAM chip and module. This new 1-Gigabit DDR2 component (x8) and a corresponding 1-Gigabyte 800Mbps (Megabits per second) DDR2 SODIMM (small outline DRAM inline memory module) - both to be processed at 40-nm - have been certified in the Intel Platform Validation program for use with the Intel GM45 series Express mobile chipsets.

"Securing extremely advanced technology and system/platform validated operability underscores our commitment as technology leader to deploying the most efficient means of producing DRAM in the marketplace," said Kevin Lee, vice president, technical marketing, Samsung Semiconductor, Inc.

The migration to 40-nm class process technology is expected to accelerate the time-to-market cycle by 50 percent - to just one year. Samsung plans to apply its 40-nm class technology to also develop a 2Gb DDR3 device for mass production by the end of 2009.

The new 40-nm class process technology will drive further reductions in voltage against a 50-nm class device, which Samsung expects to translate into about a 30 percent power savings

The finer DRAM technology node also delivers an approximately 60 percent increase in productivity over 50-nm class process technology.

In addition, Samsung expects that its 40-nm process node will mark a significant step toward the development of next generation, ultra-high performance DRAM technologies such as DDR4.

Provided by Samsung

Explore further: SDSC joins the Intel Parallel Computing Centers program

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