Engineers develop new device to cool chips at the micro scale
(Phys.org) —Engineers at the University of California, Berkeley and the University of California, San Diego, have built a novel evaporator structure that can cool chips with micro scale features. The structures are built on silicon chips for direct incorporation into electronics.
Ph.D. student Lilla Safford Smith presented her work recently at the PowerMEMS 2013 conference in London. Safford Smith, who is based at UC Berkeley, is part of the research group of Albert Pisano, dean of the Jacobs School of Engineering at UC San Diego and a professor of mechanical and electrical engineering.
Safford Smith also presented her research at the Jacobs School's Research Expo April 17 on the UC San Diego campus.
"The idea behind this project is to use liquid, in this case de-ionized water, to absorb the heat produced by any kind of device, then evaporate the liquid to dissipate heat," Safford Smith said. Keeping electronics cool has become increasingly challenging as transistors are getting smaller—and hotter.
The evaporator is built into a chip using traditional manufacturing techniques, such as photolithography and deep reactive ion etching (DRIE). It is made of silicon, with structures shaped like stone pillars that are 25 microns high, 10 microns thick and 10 microns across.
The evaporator's essential function is to ensure that a thin film of de-ionized water used to cool the chip remains the right size. The thinner the film of liquid, the more it evaporates, but if it is too thin, it can't evaporate and becomes ineffective.
The evaporators are placed over tiny—five millimeters by five millimeters—powerful heaters that heat up the water on the chip to just above its boiling point—102 to 110 degrees Celsius—215 to 230 degrees Fahrenheit. The water slowly undergoes a change of state, from liquid to gas, and evaporates.
The next step in the research is to incorporate the evaporator into a system with a wick as a pump that will allow the water to circulate to and from the hottest areas on the chip, making a completely passive thermal management device.