Xilinx Ramps Virtex-4 Shipments, Delivers Breakthrough Performance At The Lowest Cost

World's first multi-platform FPGA provides up to 10X better performance/price ratio and 2X higher performance and density, while reducing power by 50%

Xilinx, Inc. today announced immediate availability of silicon and a complete suite of design tools for its new Virtex-4 flagship product line - executing on delivery of the world's first multi-platform FPGA family produced using 90nm/300mm chip-making process technology. Notably, the Virtex-4 family is the company's second 90nm product line. Xilinx leads the PLD industry by more than a year on its proven 90nm process with manufacturing partner UMC.

Xilinx has engaged with more than 800 system designers worldwide to define this next-generation Virtex-4 product line, building upon a legacy of customer success with Virtex-II and Virtex-II Pro platform FPGAs. Consequently, Virtex-4 encompasses more than 100 technical innovations, offering designers a choice of 17 devices across three domain-optimized platform FPGA architectures: Virtex-4 LX FPGAs (logic-intensive designs), Virtex-4 SX FPGAs (high-performance signal processing), and Virtex-4 FX FPGAs (high-speed serial connectivity and embedded processing).

A multi-platform approach makes it possible for customers to select the optimal mix of resources for their application to achieve the highest functionality and performance at the lowest cost.

"With each new generation of Virtex FPGAs, we've made a commitment to our customers to deliver significantly-enhanced functionality while driving down prices," said Wim Roelandts, Xilinx Chairman and CEO. "With the Virtex-4 family, we've taken this commitment to an entirely new level for the industry - making a quantum leap in programmable device architecture, technology, and system design capabilities. Already our customers are building next-generation systems at previously unattainable price points."

Virtex-4: Expanding Into New Markets for Programmable System Design

The new Virtex-4 family is expected to propel Xilinx beyond the traditional PLD market into a broader set of applications in high-performance signal processing, embedded processing, and high-speed serial communications - thereby expanding the company's reach into a significant portion of the ASIC/ASSP market. Xilinx estimates that this could result in a total available market of $36B in revenues by 2007.

"The extra customization in these platforms improves the chip performance, shrinks the die size and therefore reduces cost because the silicon area is used more efficiently," said Serena Hsu, an analyst at Gartner Dataquest. "Gartner Dataquest believes these domain-optimized platforms will accelerate the expansion of FPGAs into new markets."

"Virtex-4 changes the ASIC-FPGA decision process. With its abundance of embedded cores, control processors, DSP, clock distribution, high-speed serial I/O, and memory, Virtex-4 domain-optimized platforms make FPGAs more efficient in terms of space, cost and power, while keeping the traditional advantages of time-to-market and flexibility," said Allan Armstrong, program director for Communications Semiconductors at analyst firm RHK, Inc. "With mask costs rising, ASIC and ASSP development is more expensive, making FPGAs competitive for a broader range of applications."

With up to 200,000 logic cells and up to 500 MHz performance, the Virtex-4 family (www.xilinx.com/virtex4) delivers up to 2X the performance and density of any FPGA currently in production. A combination of advanced deep-submicron design techniques, integrated hard IP blocks, and triple-oxide 90 nm process technology reduce both device costs and power consumption by up to 50 percent as compared to previous generation FPGAs. As part of a multi-platform offering, these advantages result in a 10X better performance/price ratio than previous generation FPGAs.

Xilinx has worked with more than 100 customers through its Virtex-4 early access program since February of this year and has been sampling the LX25 device since June. As early adopters of the Virtex-4 LX25, Agilent Labs is already implementing the advanced functionality of Virtex-4 devices into next-generation products.

"Xilinx provided us with the opportunity to participate in the Virtex-4 early access program. As a result, we are already benefiting from many of the features of these advanced Platform FPGAs in our next generation products," said August Hidalgo, senior electrical engineer at Agilent Labs. "The Virtex-4 ChipSync technology made the design of high-speed parallel interfaces much easier, while achieving the desired performance. The programmable delay elements, SerDes feature, and regional clocking inherent to Virtex-4 devices offered critical features that previously were not available." Agilent Laboratories draws on the talents of more than 300 researchers and support staff. It conducts applied research in communications, electronics, the life sciences and measurement; fundamental research in bioscience, fiber optics, materials, microelectronics, micromechanical systems and optoelectronics; and basic research.

In related news today, Xilinx announced immediate availability of Virtex-4 design software, the ISE 6.3I Design Suite, offering up to 40 percent performance lead in Virtex-4 FPGAs over the nearest competitor. Visit http: //www.xilinx.com/prs_rls/software/0494ise63i.htm.

World's First Multi-Platform FPGAs
For the first time today, Xilinx unveiled technical specifications of all aspects of the family, and complete design solutions including new reference designs, hardware platforms and design tools. New features announced today including ChipSync technology, to ease source synchronous interface design and 10/100/1000 Ethernet MAC - for lowest-cost, easiest to use Ethernet connectivity. Combined with previously announced features, Virtex-4 FPGAs become the industry's most robust, feature-rich solution for programmable systems design. For detailed information on Virtex-4 features, visit www.xilinx.com/company/press/kits/v4/factsheet.pdf.

Enabled by the revolutionary ASMBL (Advanced Silicon Modular Block) architecture, Virtex-4 FPGAs deliver more options than any other FPGA family available today. With 17 devices and three domain-optimized platforms, each platform offers an optimal mix of features for a given domain, resulting in the highest performance and lowest cost solution.

-- Virtex-4 Platform FPGA Common Features - All three platforms include a common set of breakthrough technology features, such as: 500 MHz DCM digital clock managers, PMCD phased matched clock dividers, on-chip differential clock networks, 500 MHz SmartRAM technology with integrated FIFO control logic, 1 Gbps I/Os with integrated ChipSync source synchronous technology on every I/O, and Xtreme DSP Slices.

-- Virtex-4 LX Platform FPGA - The LX platform provides all common features with up to 200,000 logic cells - making it the world's highest logic density FPGA family.

-- Virtex-4 SX Platform FPGA - The SX platform incorporates the same basic set of features as LX devices, but includes more SmartRAM memory blocks and up to 512 XtremeDSP Slices - far more than any other FPGA family on the market today. At their top speed of 500 MHz, these hardware arithmetic resources deliver an amazing aggregate DSP bandwidth of 256 GigaMACs/second, while consuming a mere 57 µW/MHz, , providing a high-performance complement to programmable DSPs.

-- Virtex-4 FX Platform FPGA - FX platform devices embed up to two 32-bit RISC PowerPC processors delivering in excess of 1300 Dhrystone MIPS along with up to four integrated 10/100/1000 Ethernet MAC cores for high-performance embedded processing applications. A new Auxiliary Processor Unit (APU) provides an intimate connection between the processors and the FPGA hardware resources - enabling a new class of flexible yet extremely high-performance integrated software/hardware designs. FX platform devices also include up to 24 RocketIO high-speed serial transceivers supporting the industry's widest performance range of 622 Mbps to 11.1 Gbps for industry-leading levels of high-speed serial performance. All key high-speed serial performance levels are supported including 10, 6.25, 4, 3.125, 2.5, 1.25, and 0.6 Gbps.

Pricing and Availability
The first device in the Virtex-4 family, the Virtex-4 LX25, is immediately available with pricing starting at $39.99 each for 25,000 unit quantities in 2005. The first devices of the Virtex-4 SX platform will be available in Q4 2004, with prices for the SX25 starting at $59.99 each for 25,000 unit quantities in 2005. The first devices of the Virtex-4 FX platform will be available in Q1 2005 with prices to be announced at time of shipment. The Xilinx EasyPath program supports the Virtex-4 family, further lowering system cost by up to 80 percent for high-volume production, while maintaining all the benefits of Virtex-4 silicon features.