TEL and IMEC collaborate on Immersion Lithography

July 9, 2004

TOKYO –Jul. 9, 2004- Tokyo Electron Limited (TEL) announced Wednesday an agreement to collaborate in research of 193nm immersion lithography with IMEC vzw (Headquarters: Leuven, Belgium, President and CEO: Gilbert Declerck), one of the world's leading independent research centers in nanoelectronics and nanotechnology. TEL will be providing its coater/developer system, CLEAN TRACK ACT 12 (*), to IMEC for research in immersion lithography technologies. This system will be installed in IMEC's new 300mm facility this summer.

Since 1998, TEL has been collaborating with IMEC at their 200mm facility in Leuven, Belgium for research into 193nm Lithography. In addition to researches of in-line CD metrology and 157nm Lithography, immersion lithography will start.

Immersion lithography within the semiconductor industry has been receiving much interest recently. It is predicted that193nm immersion lithography will replace 157nm lithography as the next generation of lithography to be used in mass production of semiconductor devices down to the 45nm node, perhaps even beyond.

Immersion lithography is a technique which requires the gap between the lens of the exposure tool and the silicon wafer to be filled with a liquid instead of air. For 193nm lithography, water has been identified as the most ideal immersion fluid. It is anticipated that this change in lithographic techniques will, in turn, have impacts on defectivity by wafers exposed to liquid and also on lithographic performance, such as CD control and pattern profile control, by the absorption of water in the resist. Most resist companies are researching the use of protective top coats to isolate the resist from the water and the optimization of the resist chemistry. The implementation of these new chemicals requires new optimization of the coater/developer configuration and recipes.

The work program between TEL and IMEC will include an investigation of methods to optimize resist processing to achieve the ultimate CD control required by the ITRS roadmap and low defectivity. Collaboration with IMEC on 193nm immersion lithography research is an excellent environment for TEL to develop new products by using actual exposure tools, as the development period of this technology is short. TEL will apply the accomplishment from this collaborative research and offer high-valued photo-resist processing to customers.

(*) CLEAN TRACK ACT is a registered trademark of Tokyo Electron Limited.

The original press release can be found here.

Explore further: Albany NanoTech Pioneers 193nm Immersion Lithography R&D with ASML, IBM, TEL, AMD and Infineon

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