Maintaining Low Power Consumption on Chips is critical to Drive Wireless Internet on a Chip Technology

Jan 03, 2006

The challenge for wireless device manufacturers lies in developing handheld devices that offer an array of services while maintaining power-efficiency and offering high-performance.

"Convergence of computing capabilities and communication protocols has resulted in the development of devices with enhanced functionalities and capabilities. Providing a range of functions at a low cost while maintaining the reliability and compatibility of existing systems and devices is a major challenge today," says Technical Insights Research Analyst Ms Vedavalli Rangan. "As devices become more complex with numerous features, it is of prime importance to find out ways to extract more power from the batteries."

Moreover, the circuit complexity that comes with the use of isolated application specific chips, as found in traditional systems, is compelling chip manufacturers to focus on curbing power dissipation right at the design stage. The emergence of wireless communications with embedded intelligence is playing an important role in reducing power consumption.

The elimination of delays due to the absence of buses for interchip communications as seen in System on Chip (SoC) designs considerably improve device performance.

The SoC design that follows the Moore's Law consists of the microprocessor, the digital signal processor that runs the embedded software, the memories and application specific chips, and other peripherals, all in one single chip.

SoC basically allows chip manufacturers to reduce the extra cost incurred in the design and fabrication of application-specific chips by integrating the entire system functionality on a single chip along with the core processor components.

Firstpass Semiconductor AB, based in Stockholm, and US-based Firstpass Technologies Inc. have developed a single chip wireless Internet phone using CMOS Technology. Based on voice over wireless local area network (VoWLAN), this technology provides solutions to SoC integration of radio, mixed signal and DSP on the same chip for high-volume low-end products.

Most importantly, the chip supports several low-power operations. It also includes an analog interface for connection to devices such as a MIC, speaker and ring, serial interface for keyboards and displays, data and address interface for external memory, and RF front-end component interface.

Despite the many benefits of SoC, it involves various design level challenges due to the lack of specific standards for implementation. There is a need for tools that can perform system-level verification in a virtual environment before entering the actual manufacturing cycle.

Manufacturers are now working towards developing energy efficient chips by increasing the speed. Instead of SoC solutions, System-in-Package (SiP) solutions that come with necessary software are expected to gain in popularity as they eliminate problems relating to vendor interoperability.

The semiconductor division of Netherlands-based Royal Philips Electronics has developed a SiP solution that enables multimedia content delivery. Philips SiP solutions deliver an entire range of functionalities of 802.11g that give end users faster access to rich multimedia content and data through WLAN.

The 802.11g SiP operates using the lowest standby power. Moreover since it has the capability to operate at power levels lesser than that possessed by GSM in standby mode, it is ideal for power management schemes. In conjunction with bluetooth wireless, it is a robust solution for portable applications.

"It contains an integrated ARM 7 processor, 1.25 MB SRAM, 256 KB read only memory (ROM) with the integrated hardware and software routines for managing power," observes Ms. Rangan. "This implementation addresses the critical issues such as power consumption, battery life and size in mobile phones and other portable consumer applications."

Source: Frost & Sullivan

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