Closing the Loop: Georgia Tech Researchers Develop New Data-driven Closed-loop control for stencil printers

Jul 26, 2004
Closing the Loop: Georgia Tech Researchers Develop New Data-driven Closed-loop control for stencil printers

In electronics assembly, 60 to 70 percent of final defects occur during the stencil printing process (SPP), a stage of surface-mount technology for printed circuit board assembly.

To address this problem, engineers at Georgia Tech’s Center for Board Assembly Research (CBAR) have developed a new data-driven, closed-loop control technology that adjusts equipment parameters in real time, resulting in fewer defects and higher yields.

In SPP, a metallic stencil is placed over the printed circuit board, and a squeegee pushes solder paste through apertures in the stencil onto the board’s surface where components will then be placed for electrical connections. The goal is to deposit the solder onto the pad as accurately as possible because unevenly applied paste can cause various defects.

A number of factors affect the solder deposition, such as variations in air temperature, chemical-physical characteristics of the solder paste and aging of the stencil, which can cause clogging. The shrinking size of components and a subsequent increase in circuit density present an even bigger challenge.

“That reduces the distance between components’ leads, which makes the deposition of solder paste even more difficult,” says Alex Goldstein, director of operations and infrastructure at CBAR, which is housed in Georgia Tech’s Manufacturing Research Center.

Up to now, screen-printer operators have gauged product quality by sight. In some cases, automated optical inspection (AOI) technology can be used to assess quality, but human operators still must decide how to adjust machine settings based on the data presented by the AOI.

A major step forward for the electronics industry, CBAR’s technology closes the loop between an AOI system and stencil printer, automatically assessing quality and adjusting machine parameters in real time. (Studies have shown that correcting a print defect at the end of the PCB assembly line typically costs 50 times more than it does to correct the defect at the SPP phase.)

How it works: At the heart of this patent-pending technology is a novel algorithm. During operations, sensors measure the height, area and volume of solder paste deposits. Then the control algorithm uses that information to determine whether changes are required, adjusting in real time the speed and pressure of squeegees that apply the solder paste.

“The algorithm catches problems very early that a human operator would never notice,” says Professor Emeritus Edward Kamen of Georgia Tech’s School of Electrical and Computer Engineering. Kamen spearheaded the project several years ago when he was director of CBAR.

“One of the novel aspects of this algorithm is that it utilizes a small amount of data to generate the change in controls – a whole order of magnitude less than existing control schemes,” Kamen says, noting that large amounts of data would slow production.

In addition to Kamen and Goldstein, other researchers working on the project include Magnus Egerstedt, an assistant professor at the School of Electrical and Computer Engineering (ECE), and Leandro Barajas, a former ECE graduate student.

In April, Speedline Technologies Inc., a Franklin, Mass.-based manufacturer of equipment for the electronics assembly and semiconductor industries, signed an exclusive agreement to license the technology from Georgia Tech. CBAR researchers will work with Speedline to continue enhancing the technology.

Beyond stencil printing, this new process-control technology could also be adapted for semiconductor manufacturing, such as wafer bumping and polymer film deposition. CBAR’s process-control approach also has potential for other stages of surface-mount technology, such as component placement (known as “pick and place”).

“The data-driven closed-loop control technology not only helps now, it also will extend the life of SPP in the electronics industry as components go to even smaller dimensions,” Egerstedt says.

Picture: Engineers at Georgia Tech's Center for Board Assembly Research (CBAR) have developed a new data-driven, closed-loop control technology that adjusts electronics assembly equipment parameters in real-time, resulting in fewer defects and higher yields. CBAR director Alex Goldstein (left) and researcher Magnus Egerstedt were among the researchers working on the project.
Georgia Tech Photo: Gary Meek


Source: Georgia Institute of Technology

Explore further: HP supercomputer at NREL garners top honor

add to favorites email to friend print save as pdf

Related Stories

Obama unveils new measures to stem identity theft

50 minutes ago

US President Barack Obama on Friday ordered "pin and chip" security measures for government payment systems, aiming to stem the proliferation of credit card fraud and identity theft.

Twitpic to shutter service after all

1 hour ago

Twitpic on Friday put out word that the service is shutting down after all, apologizing for a "false alarm" that a merger would be its salvation.

Microsoft CEO launches diversity training effort

2 hours ago

(AP)—Microsoft CEO Satya Nadella has again apologized to employees and announced in a company-wide memo that all workers will receive expanded training on how to foster an inclusive culture as he works to repair damage ...

Recommended for you

Apple sees iCloud attacks; China hack reported

11 hours ago

Apple said Tuesday its iCloud server has been the target of "intermittent" attacks, hours after a security blog said Chinese authorities had been trying to hack into the system.

HP supercomputer at NREL garners top honor

13 hours ago

A supercomputer created by Hewlett-Packard (HP) and the Energy Department's National Renewable Energy Laboratory (NREL) that uses warm water to cool its servers, and then re-uses that water to heat its building, has been ...

User comments : 0