FlipChip, NEC sign cross-license agreement for advanced wafer level packaging technology

Apr 21, 2005

FlipChip International and NEC Electronics today announced that the two companies have entered into an extensive patent cross-licensing agreement for advanced wafer level packaging, flip chip bumping, solder bump reinforcement and wafer applied underfill technologies. As part of the agreement, FlipChip International will license its wafer level packaging patents including Ultra CSP, Polymer Collar, and Spheron product types to NEC Electronics. NEC Electronics will license its redistribution wafer level packaging, solder bump reinforcement and wafer applied underfill patents to FlipChip International.

Wafer level packaging, a process whereby semiconductors are packaged on the wafer prior to dicing, offers significant advantages in form factor and weight that enable real chip-scale packaging (CSP). The two companies will apply these advanced packaging technologies to devices such as discrete components, logic, ASICs, microprocessors, flash memory and other next generation devices for applications in the mobile phone, digital still camera, automotive, PDA and other emerging markets.

Commenting on the agreement, Bob Forcier, President and CEO of FlipChip International, said, "We are very pleased to commence a cross licensing agreement with NEC Electronics for next generation flip chip and wafer level packaging, which provide substantial improvements in performance, lower costs and dramatic reductions in size compared to traditional packaging technologies. This agreement has a strong upside for both companies."

"FlipChip International is renowned for its wafer level packaging technologies, and we are confident that this cross-licensing agreement will be beneficial for both companies," said Satoshi Takabayashi, general manager, Packaging Engineering Division, NEC Electronics. "Intellectual property is essential to our business, and this agreement enables both companies to provide our respective customers with advanced wafer level packaging technologies for rapidly growing markets."

Explore further: 3-D-printable materials deform to change surface area, enabling curvature rather than rigid folding

add to favorites email to friend print save as pdf

Related Stories

A bright future for LEDs

Dec 05, 2014

A single wafer-level LED chip that produces more than 150 Watts of light output has been made in work form China. This level of output from a single chip makes applications for LEDs in high power lighting ...

Recommended for you

North Korea behind Sony hack, FBI says

2 hours ago

North Korea was responsible for a "destructive" cyber attack on Sony Pictures, the US Federal Bureau of Investigation said Friday, warning it would hunt down the perpetrators and make them pay.

Clooney slams skittish Hollywood after Sony hack

4 hours ago

Film star George Clooney slammed the Hollywood movie industry for failing to stand up against the cyber threats that prompted Sony Pictures to cancel release of the movie "The Interview."

The state of shale

5 hours ago

University of Pittsburgh researchers have shared their findings from three studies related to shale gas in a recent special issue of the journal Energy Technology, edited by Götz Veser, the Nickolas A. DeCecco Professor of Che ...

Coping with floods—of water and data

6 hours ago

Halloween 2013 brought real terror to an Austin, Texas, neighborhood, when a flash flood killed four residents and damaged roughly 1,200 homes. Following torrential rains, Onion Creek swept over its banks and inundated the ...

User comments : 0

Please sign in to add a comment. Registration is free, and takes less than a minute. Read more

Click here to reset your password.
Sign in to get notified via email when new comments are made.