Figure 1: Principle of spin-torque-transfer (STT) MRAM

Fujitsu Laboratories and the University of Toronto today announced that they have jointly developed the world's first high-reliability read-method for use with spin-torque-transfer (STT) MRAM that is insusceptible to erroneous writes.

STT MRAM is regarded as a potential future form of non-volatile memory that could be used as an alternative to flash memory. NOR flash memory that is embedded in microcontrollers widely used in mobile phones and other is expected to reach the limits of its feasible miniaturization in the near future, which has led to the search for an alternative low-power non-volatile memory that will allow continued necessary miniaturization. By resolving one of the major obstacles to using STT MRAM, Fujitsu and the University of Toronto's new read-method marks a major step towards the practical implementation of STT MRAM as a necessary replacement for flash memory, in view of future requirements that will be necessary for compact and low-power electronic devices.

Details of this technology were presented at the IEEE International Solid-State Circuits Conference 2010 (ISSCC 2010) being held in San Francisco from February 7-11.

Many electronic devices such as mobile phones or PDAs use microcontrollers with embedded flash memory, which allows onboard software to be rewritten. However, NOR flash memory used in such microcontrollers is nearing the physical limits of its miniaturization, which has led to research on various types of memory that could replace NOR flash memory.

STT MRAM, which uses as the element, is gaining attention as an emerging potential candidate to replace flash memory, as STT MRAM meets the needs for speed, low , and miniaturization that would make it a good candidate to replace flash memory.

STT MRAM uses memory storage elements that take advantage of the effect in which a current that is passed through a magnetic material - such as a magnetic tunnel junction (MTJ) - reverses its direction of magnetization (Figure 1). Passing a current through the MTJ causes its direction of magnetization to switch between a parallel or anti-parallel state, which has the effect of switching between low resistance and high resistance. Because this can be used to represent the 1s and 0s of digital information, STT MRAM can be used as a non-volatile memory.

Reading STT MRAM involves applying a voltage to the MTJ to discover whether the MTJ offers high resistance to current ("1") or low ("0"). However, a relatively high voltage needs to be applied to the MTJ to correctly determine whether its resistance is high or low, and the current passed at this voltage leaves little difference between the read-current and the write-current. Any fluctuation in the electrical characteristics of individual MTJs could cause what was intended as a read-current, to have the effect of a write-current, thus reversing the direction of magnetization of the MTJ (Figure 2).

Figure 2: Erroneous-read issue encountered with spin-torque-transfer (STT) MRAM

Attempting to detect whether resistance is high or low by passing a current through this element can cause its magnetic direction to switch, because of the read current itself.

In a joint collaboration, Laboratories and the University of Toronto have developed an innovative circuit design (Figure 3) that for the first time resolves the issue of erroneous writes in STT MRAM during read operations.

The newly developed read-method uses a negative resistance that is intermediate between the MTJ's high resistance and low resistance on a parallel circuit (Figure 4). If the MTJ is in a high-resistance state, this circuit exhibits negative-resistance characteristics. If the MTJ is in a low-resistance state, then it exhibits normal-resistance characteristics. These characteristics allow the resistance value to be read at lower voltages than before, suppressing the tendency of the read operation to reverse the direction of magnetization and avoiding the problem of erroneous write operations.

  • Figure 3: Spin-torque-transfer MRAM circuit embedded in a CMOS chip

  • Figure 4: Circuit employing negative resistance

The development of this new read circuit with negative resistance has resulted in STT MRAM that is insusceptible to erroneous writes caused by fluctuations in the electrical characteristics of the MTJs. It is anticipated that the STT MRAM used as miniaturized non-volatile memory would enable greater high-performance in mobile phones and other electronic devices.

Provided by Fujitsu