News tagged with immersion lithography
Imec, ASML demonstrate potential of 193nm immersion lithography with freeform illumination
Imec and ASML collaborated to qualify ASML's Tachyon Source Mask Optimization and programmable illuminator system FlexRay, proving its potential with the demonstration of a 22nm SRAM memory cell.
Jul 14, 2010 |
5 / 5 (3) |
0
Toshiba, AIST Develop Mask Pattern Optimizing Technology That Extends Life of Optical Lithography
Toshiba and Japan's National Institute of Advanced Industrial Science and Technology (AIST) today announced joint development of a mask pattern optimizing technology that improves the accuracy of lithography ...
Feb 15, 2010 |
5 / 5 (3) |
0
Search results for immersion lithography
Imec releases industry’s first 14nm process development kit
Imec today announces that it has released an early-version PDK (process development kit) for 14nm logic chips. This PDK is the industry’s first to address the 14nm technology node. It targets the introduction of a number ...
Mar 07, 2012 |
3 / 5 (5) |
1
New technique produces free-standing piezoelectric ferroelectric nanostructures from PZT material
(PhysOrg.com) -- Researchers have developed a “soft template infiltration” technique for fabricating free-standing piezoelectrically active ferroelectric nanotubes and other nanostructures from PZT ...
Feb 22, 2012 |
5 / 5 (7) |
4
|
World's first 300mm-fab compatible directed self-assembly process line
At next week’s SPIE Advanced Lithography conference (San Jose, CA), imec announces the successful implementation of the world first 300mm fab-compatible Directed Self-Assembly (DSA) process line all-under-one-roof ...
Feb 10, 2012 |
4 / 5 (1) |
0
New technique makes it easier to etch semiconductors
Creating semiconductor structures for high-end optoelectronic devices just got easier, thanks to University of Illinois researchers.
Dec 22, 2011 |
3.6 / 5 (5) |
3
|
Apparent roadblock in the development of quantum lithography
(PhysOrg.com) -- Just when it began to appear that scientists had found a viable way around the problem of the blurring that occurs when using masks to create smaller and smaller silicon wafers for computer ...
May 20, 2011 |
4.2 / 5 (5) |
5
|
Engineer shrinks 'U' logo
In an example of how a technology wonk displays school spirit, an engineer has created a golden University of Utah logo that is smaller than the width of an average human hair.
Nanotechnology / Nanomaterials
Sep 17, 2010 |
not rated yet |
0
Toshiba develops cost-effective 32nm CMOS platform technology by advanced single exposure lithography
Toshiba Corporation today announced a cost-effective 32nm CMOS platform technology that offers higher density and improved performance while halving the cost per function from 45nm technology.
Dec 18, 2008 |
5 / 5 (1) |
0
Intel to produce 32nm chips
Intel Corp., the world's biggest computer chip-maker, said Wednesday that it has developed a manufacturing process that shrinks the circuitry in a chip to just 32 nanometers.
Dec 10, 2008 |
4.1 / 5 (31) |
9
Elpida Completes Development of New 50nm Process 2-Gigabit Mobile RAM
Elpida Memory today announced that it had completed development of a 50nm process 2-gigabit Mobile RAM product using 50nm process technology with 193nm (ArF) immersion lithography and copper interconnect.
Dec 10, 2008 |
4 / 5 (1) |
0
Elpida Completes Development of 50nm Process DDR3 SDRAM
Elpida Memory, Japan's leading global supplier of Dynamic Random Access Memory (DRAM), today announced that it has completed development of a 50nm process DDR3 SDRAM. The new DRAM product features the lowest power consumption ...
Nov 26, 2008 |
3 / 5 (2) |
0
List of search results for immersion lithography
