Intel's Core Microarchitecture Sets New Records in Performance and Energy EfficiencyMay 23, 2006 in Technology / Hardware
Intel today disclosed record breaking results on 20 key dual-processor (DP) server and workstation benchmarks. The first processor due to launch based on the new Intel Core microarchitecture — the Dual-Core Intel Xeon processor 5100 series, previously codenamed “Woodcrest” — delivers up to 125 percent performance improvement over previous generation dual-core Intel Xeon processors and up to 60 percent performance improvement over competing x86-based architectures, whilst also delivering performance per watt leadership.
“The performance and system-level power consumption we’re seeing from our platforms built around the new Core microarchitecture has exceeded even our expectations,” said Kirk Skaugen, vice president and general manager of Intel’s Server Platforms Group. “At the same time, customers demand more than just energy-efficient performance. We’ve developed a superior platform that delivers the latest server technologies including faster and more reliable memory, Intel Virtualization Technology (Intel VT), Intel Active Server Manager and Intel I/O Acceleration Technology. (Intel I/OAT)”
Fully-buffered dual in-line memory (FB-DIMM) technology allows for better memory capacity, throughput and overall reliability. This is critical for creating balanced platforms using multiple cores and the latest technologies, such as virtualization, to meet the expanding demand for compute headroom.
Shipping in Intel Xeon MP processors since last year, Intel Virtualization Technology (Intel VT) provides silicon-level software support that improves dependability and interoperability and is enabling faster industry innovation. Intel Active Server Manager integrates hardware, software and firmware to manage today’s complex datacenters and enterprise environments. Intel I/O Acceleration Technology (Intel I/OAT) improves application response time, server I/O performance and reliability.
Intel’s new server and workstation platforms, codenamed “Bensley” and “Glidewell” respectively, are architected for today’s dual-core processors. They will also support dual- and quad-core processors built using Intel’s 65-nanometer (nm) and future process technologies.
The first processors for Bensley and Glidewell are in the Dual-Core Intel Xeon processor 5000 series, previously codenamed “Dempsey.” Shipping since March at a new low price point, they bring innovation, higher performance and lower power consumption to the value server and workstation segment.
Complementing the 5000 series, Intel will ship the next processor for Bensley and Glidewell in June – the Dual-Core Intel Xeon processor 5100 series. Based on the Intel Core Microarchitecture, the majority of these processors will only consume a maximum of 65 watts.
Using the SPECint_rate_base2000 benchmark, which measures integer throughput, a Dell PowerEdge 2950 server based on the Dual-Core Intel Xeon processor 5100 series scored 123.0, setting a new world record.
Using the SPECjbb2005 benchmark, the Fujitsu-Siemens PRIMERGY RX200 S3 server based on the Dual-Core Intel Xeon processor 5100 series broke the previous record with a score of 96,404 business operations per second.
An HP Proliant ML 370 G5 server based on the Dual-Core Intel Xeon processor 5100, and using the TPC-C benchmark, which measures database performance, smashed another world record by scoring 169,360 tpmC at $2.93/tpmC.
IBM is also in the record books with the IBM System x3650 server based on the Dual-Core Intel Xeon processor 5100 series, which scored 9,182 simultaneous connections in the SPECWeb2005 benchmark, which measures web server performance.
Other leading benchmarks on Dual-Core Intel Xeon processor 5100 series-based servers include Lotus Domino (R6iNotes), Microsoft Exchange Server 2003 (MMB3), SPECfp_rate_base2000 and SAP-SD 2-Tier.
"Intel's Core Microarchitecture Sets New Records in Performance and Energy Efficiency" May 23, 2006 http://phys.org/news/2006-05-intel-core-microarchitecture-energy-efficiency.html