New architectural guidelines to assist programmers develop wireless Internet services for 3G devices such as PDAs, camera-phones, data terminals, etc and overcome difficulties such as reduced screen sizes, varying bandwidth, handling mobility etc. were demonstrated by project WISE.
The main purpose of the architectural guidelines is to provide a unified and organised approach to the description of the software architecture. The architecture is described both from an abstract conceptual perspective and a detailed concrete one. “We use three iterations to produce a description,” says Maurizio Morisio, coordinator of this IST programme-funded project. “In each iteration we produce three papers: an abstract implementation of the service, an analysis of the processes to develop the services and architecture to support the services, and guidelines for devices. The latter specifies how to handle various characteristics that may impinge upon the services offered, such as variations in screens used, absence or presence of a keyboard or mouse, and so on.”
In practice, it’s quite complex having a generalised architecture, so WISE is using typical architectures. “We have two architectures,” says Morisio. “One corresponds to a J2ME Java Fat Client, and the other to a Thin Client which has a simpler user interface.”
In parallel with the work on architectures, WISE pilot trials have demonstrated two prototype services. “One is a game that uses mobile phone GPRS data connections, and which is played by more than one player,” says Morisio. “The second is an online trading application for high-volume share trading. It runs on a mobile phone, and is a reduced version of the RealTick service that provides a real-time display of current share prices.”
The project is currently in negotiation with a large publisher of technical books with a view to publishing the WISE architecture handbook. One of the consortium partners has signed a deal with Telecom Italia Mobile to provide the online trading service as a real commercial application.
Source: Politecnico di Torino - Dipartimento di Automatica e Informatica
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