Samsung Develops 40nm 32 Gb NAND Flash

Sep 11, 2006
Samsung Develops 40-nm 32 Gb NAND Flash

Samsung Electronics today announced that it has developed the industry’s first 40-nanometer memory device. The new 32 Gigabit (Gb) NAND flash device is the first memory to incorporate a Charge Trap Flash (CTF) architecture, a revolutionary new approach to further increase manufacturing efficiency while greatly improving performance.

The new CTF-based NAND flash memory increases the reliability of the memory by sharply reducing inter-cell noise levels. Its surprisingly simple structure also enables higher scalability which will eventually improve manufacturing process technology from 40 nm to 30 and even 20nm.

In each 32Gb device, the control gate in the CTF is only 20 percent as large as a conventional control gate in a typical floating gate structure. With CTF, there is no floating gate. Instead, the data is temporarily placed in a “holding chamber” of the non-conductive layer of the flash memory composed of silicon nitride (SiN). This results in a higher level of reliability and better control of the storage current.

The 32Gb NAND flash memory can be used in memory cards with densities of up to 64-Gigabytes (GBs). One 64GB card can store over 64 hours of DVD resolution movies (40 movies) or 16,000 MP3 music files (1,340 hours).

The CTF design is enabled through the use of a TANOS structure comprised of tantalum (metal), aluminum oxide (high k material), nitride, oxide and silicon. The use of a TANOS structure marks the first application of a metal layer coupled with a high k material to the NAND device.

The TANOS CTF architecture, which serves as the foundation of the 40nm 32Gb CTF NAND flash announced today, was developed after extensive research of the Samsung Semiconductor R&D department. Samsung first revealed the TANOS structure through a paper at the 2003 International Electron Devices Meeting (IEDM).
The new 32Gb CTF memory was announced at the sixth annual Samsung press conference in Seoul.

Introduction of a 40nm manufacturing process for 32Gb NAND flash marks the seventh generation of NAND flash that follows the New Memory Growth Theory of double-density growth every 12 months, which was first presented by Dr. Chang Gyu Hwang, president and CEO of Samsung Electronics’ Semiconductor Business in a keynote address at ISSCC 2002.

Source: Samsung Electronics

Explore further: Online phishers are 'farcing' your brains out

add to favorites email to friend print save as pdf

Related Stories

Samsung introduces new branded SSD powered by 3D V-NAND

Jul 01, 2014

Samsung Electronics today launched the 850 PRO, a new solid state drive (SSD) line-up featuring Samsung's cutting-edge three-dimensional (3D) vertical NAND (V-NAND) flash memory technology. The new Samsung ...

Recommended for you

Tesla loss widens as it ramps up expansion plan

7 minutes ago

US electric automaker Tesla Motors reported Thursday a widening loss in the past quarter amid record revenues as it ramped up plans for a giant battery plant for future vehicles.

CIA director reverses himself on Senate spying

31 minutes ago

For months, CIA Director John Brennan had stood firm in his insistence that the CIA had little to be ashamed of after searching the computers of the Senate Intelligence Committee. His defiant posture quickly ...

Tesla says decision on battery factory months away

37 minutes ago

(AP)—Electric car maker Tesla Motors said Thursday that it is preparing a site near Reno, Nevada, as a possible location for its new battery factory, but is still evaluating other sites.

Taking great ideas from the lab to the fab

11 hours ago

A "valley of death" is well-known to entrepreneurs—the lull between government funding for research and industry support for prototypes and products. To confront this problem, in 2013 the National Science ...

User comments : 0