Significant Achievements in Intel's EUV Lithography Program

Lithography is the technology used to print circuits onto computer chips. In order to pack more and more transistors onto a chip, semiconductor manufacturers must print ever-smaller features. EUV lithography is being developed because current chip-printing technology is expected to reach its limits in the next few years. Intel is targeting this technology for high- volume manufacturing in 2009.

The EUV Micro Exposure Tool (MET) and the establishment of an EUV mask pilot line using the world's first EUV mask making tools will let Intel print circuits with feature sizes as small as 30 nanometers (nm), in preparation for the 15 nm resolution that will be required when EUV lithography goes into production. By contrast, the smallest feature size being printed today in Intel's manufacturing facilities measures 50 nm.

"We are making progress toward implementing EUV lithography technology in manufacturing with the 32nm process in 2009," said Ken David, director of components research for Intel's Technology and Manufacturing Group. "This technology will help us continue to deliver the benefits of Moore's Law into the next decade."

Similar to a painter who needs a tiny brush to paint fine lines, the semiconductor industry must use increasingly shorter wavelengths of light to print smaller circuits on a chip. Today's optical lithography uses larger wavelengths that are not able to print the tiny features that will be required in the next few years as transistors and other circuit elements shrink in size. Since EUV lithography uses light with a wavelength of only 13.5 nm, versus the 193 nm light of today, it could become vital in the manufacturing of future chips, though some challenges still remain in the development of the technology.

Intel will use the MET to address two of the key challenges in the development of EUV lithography: the development of the photoresist, an important chemical mixture used in printing chips; and the impact of imperfections on the mask that includes the circuit pattern to be printed on the wafer. The MET will also allow Intel to focus on optimizing the variables that are required for printing the tiny features required in a high-volume manufacturing setting.

In addition to the installation of the MET, Intel successfully set up an EUV mask pilot line, the foundation needed for future mask production, which Intel intends to do internally. The pilot line builds in EUV-specific modules into Intel's existing in-house mask production process and includes the world's first commercial EUV mask making tools.

While the MET and EUV mask pilot line mark significant milestones, Intel continues to actively invest in and work with the industry on the development of the necessary infrastructure and additional tools to ensure that EUV lithography is ready for manufacturing in 2009. Strategic investments in research and development and joint development programs with such companies as Cymer, Media Lario and NaWoTec continue to move forward the development of EUV lithography.

The original press release can be found here.