Buried silver nanoparticles improve organic transistors

Aug 10, 2010

Out of sight is not out of mind for a group of Hong Kong researchers who have demonstrated that burying a layer of silver nanoparticles improves the performance of their organic electronic devices without requiring complex processing. Their findings in a report published in the journal Applied Physics Letters, which is published by the American Institute of Physics (AIP).

A team led by Professors Paddy Chan and Dennis Leung of the Hong Kong Polytechnic University has shown that a simple layer of placed between two layers of the organic semiconductor pentacene improves performance just as much as painstakingly placing nanoparticles atop a tiny floating gate region.

Because certain metal nanoparticles trap electric charges very effectively, they are becoming a popular additive for enhancing transistor performance and producing thinner transistors. Sandwiching a layer of nanoparticles is much more compatible with the low-cost, continuous roll-to-roll fabrication techniques used to make organic electronics than the more intricate patterning required to put material just in the transistor gate area.

Moreover, Chan's group showed that the thickness of the nanoparticle layer changes the device performance in predictable ways that can be used to optimize transistor performance to meet application requirements.

Transistors made with a 1-nanometer nanoparticle layer, for example, have stable memory that lasts only about three hours, which would be suitable for memory buffers. Transistors having a 5-nanometer-thick layer are more conventional and retain their charge for a much longer time.

"We believe that has a very high potential for use in next-generation -- such as touchscreens and electronic paper -- where their flexibility and low-cost are most important," said Dr. Sumei Wang, a postdoctoral research fellow of the team.

Explore further: Pressure probing potential photoelectronic manufacturing compound

More information: "Nonvolatile organic transistor-memory devices using various thicknesses of silver nanoparticle layers" , Paddy K. L. Chan, Sumei Wang and Chi Wah Leung, apl.aip.org/applab/v97/i2/p023511_s1

Provided by American Institute of Physics

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