3-D microchips for more powerful and environmentally friendly computers

Dec 11, 2009
A new technology for stacking several layers of microprocesssors, which is being developed at EPFL in collaboration with ETHZ and IBM Research, could boost the performance of computer chips by a factor 10. The team estimates that the first 3-D chips will be implemented in supercomputers by 2015 with a novel internal cooling system fully operational by 2020, for even further improvements. Credit: Reference: EPFL, LTCM, John R. Thome; Infograph: Pascal Coderay, pascal@salut.ch.

Not so long ago our computers had a single core which had to be boosted for performance - making each machine into a great central heating system. Beyond 85° C, however, electronic components become unstable. To overcome this physical limit, a solution was found with the multicore technology, where the same chip includes several processors which share tasks. Most of today's consumer electronics proudly boast a "dual core" or "quad core". However, in time the technology will come up against the same physical limits.

3D processors build on the idea of multicores. However, the cores are stacked vertically rather than placed side-by-side as in current processors. The advantage is that the entire surface of the core can be connected to the next layer, through 100 to 10,0000 connections per mm2. Shorter and more numerous, these minute interconnects should ensure that data transfer is 10 times faster, while reducing and heat.

The Environment at Stake

The technological challenge is clear in terms of performance. But there is also an environmental stake. As John R. Thome, of the EPFL in Lausanne, explains: "In the United States, the industry's data centres already consume as much as 2% of available electricity. As consumption doubles over a five-year period, the supercomputers of 2100 would theoretically use up the whole of the USA's electrical supply".

Although 3D microprocessors will use up less energy and generate less heat, they will still warm up. This is why John R. Thome's team is in charge of developing a revolutionary . Channels with a 50-micron diameter are inserted between each core layer. These microchannels contain a cooling liquid, which exits the circuit in the form of vapour, is brought back to the liquid state by a condenser and finally pumped back into the processor. Next year, a prototype of this cooling system will be implemented and tested under actual operating conditions - but without a processor.

CMOSAIC is mostly funded by the SNSF via its Nano-Tera programme dedicated to cutting-edge information technology. Six labs at EPFL, ETH Zurich and IBM also contribute to financing and are each investigating a specific aspect of the project, coordinated by John R. Thome of EPFL, on the shores of Lake Geneva.

It will take a few years until 3D microchips equip consumer electronics. The initial 3D microprocessors should be fitted on supercomputers by 2015, while the version with an integrated cooling system should go to market around 2020.

Source: Ecole Polytechnique Fédérale de Lausanne

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axemaster
1 / 5 (1) Dec 12, 2009
Erm... If you make the processors thicker, won't the surface area/volume ratio get much much worse? So you'd be decreasing the power through each processor, but increasing the amount of them - sounds like it will put off just as much if not more heat than before, and it would be harder to cool.

"Shorter and more numerous, these minute interconnects should ensure that data transfer is 10 times faster, while reducing energy consumption and heat."

This statement is patently false. Making shorter and more numerous connections increases heat a great deal because of the increases in resistance.
xapemanx
5 / 5 (1) Dec 12, 2009
Erm... If you make the processors thicker, won't the surface area/volume ratio get much much worse?

adding another transistor surface would mean you would have another cooling surface. it scales.

Making shorter and more numerous connections increases heat a great deal because of the increases in resistance.

shorter connections means less resistance and less heat. which leaves room for more connections. that's why 90nm chips are left in the dust.

a new cooling design is necessary because a chip designed in the third dimension rather than the second will have exponentially more heat so in lieu you have to design a cooling system in the third dimension as well, so they can scale indefinitely, together.

the 3d chip will require more total wattage than a 2d chip of the same area. but in volume and density terms they would be close to the same. the 3d chip having once again exponentially more transistors.
flaredone
5 / 5 (1) Dec 12, 2009
It's evident, 3D processors will not more environmentally friendly, if they contain more transistors and if they need an internal cooling - they're just stacked in 3D. In addition, we can expect, future processors will heavily paralleled analogously to the contemporary Nvidia/ATI GPU's - so we should learn parallel programming soon. As a neat introduction to this paradigm can serve MS Accelerator library, more advanced projects are NVidia CUDA and ATI's Stream technology. Procedural DO-LOOP structures are dead and they will be replaced by functional languages.
Husky
not rated yet Dec 12, 2009
its obvious that a 3d cube has less exposed surface area for passive cooling than a couple of 2d rectangles, however, as i understand it, they propose that this is offset by shorter interconects and less power required to move data between cpu's?
El_Nose
not rated yet Jan 12, 2010
SPMD (Single Process, Multiple Data) is a simple and straight forward approach to including a parallel programing paradigm at the university level. It takes in all the discipline you learned with threads and simplifies the entire process.

Ahh the exposed surface area of a cube is large than that of a rectangle of the same W x D but the SA : VOL ratio does get worse

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