Renesas Technology Corp. today announced the R1FV04G13R and R1FV04G14R 4-gigabit (Gbit) AG-AND type flash memories, offering the world's fastest programming speed of 10 Mbytes/sec, for high-speed recording of large volumes of data for moving picture and similar applications. Sample shipments began in September 2004 in Japan, followed by mass production in December.
The R1FV04G13R and R1FV04G14R have ×8 and ×16 bit configurations respectively, and offer the following major features.
(1) World's fastest 4-Gbit flash memories
As second-phase AG-AND type flash memories implementing multi level cell technology*2 and high speed, the R1FV04G13R and R1FV04G14R achieve a fast programming speed of 10 Mbytes/sec even with a 4-Gbit capacity. When dubbing a 2-hour movie using MPEG-4, recording can be completed in approximately two minutes.
(2) World's Smallest chip size
The use of a 90 nm process and improved AG-AND flash memory cell design has resulted in the world's smallest chip size in currently commercially developed 4-Gbit flash memory devices. The chip area has been reduced by approximately two-thirds per gigabit compared with 1-Gbit AG-AND type flash memory.
The release of these new products makes possible fast downloading and transporting of large-volume content data such as moving pictures and music. As a result, usage scenarios previously restricted to digital cameras and PCs can now be extended to mobile terminals and digital home appliances, expanding the range of system solutions that employ flash memory as a storage medium.
High-density flash memory is beginning to permeate our lives as a bridge medium, especially in mobile applications, including use as image storage memory for digital cameras and mobile phones, and USB storage as a replacement for floppy disk drives. Next-generation flash memory cards offering portability of large-volume, high-quality moving picture data such as movies will require significantly higher density and higher programming speeds to handle fast data downloads.
To meet these needs, Renesas Technology currently mass-produces 130 nm process 1-Gbit AG-AND type flash memory offering both a smaller cell area and a high programming speed of 10 Mbytes/sec through the use of assist gates (AGs) to prevent inter-cell interference, together with multi level cell technology developed through the company's expertise in the field of conventional AND type flash memory.
To meet the demand for higher density while also achieving higher speeds, in December 2003 Renesas Technology developed a second-generation AG-AND type flash memory cell, featuring an approximately one-third reduction in memory cell area through improvements to the first-generation AG-AND type flash memory cell design and the use of a 90 nm process. Renesas Technology has now completed commercial development of the R1FV04G13R and R1FV04G14R, the world's fastest small 4-Gbit AG-AND type flash memories, using this second-generation memory cell.
The R1FV04G13R and R1FV04G14R enable 512-Mbyte recording media to be configured with a single chip, providing storage capability of approximately 160 minutes of MPEG-4 moving picture data, MP3 music data equivalent to approximately 130 tracks, or approximately 500 4-megapixel digital camera photographs.
Features of the R1FV04G13R and R1FV04G14R are summarized below.
(1) World's fastest programming speed of 10 Mbytes/sec for 4-Gbit flash memory
As with 1-Gbit products, use of the hot electron injection programming method *3 and simultaneous 4-bank programming operation within the chip has made it possible to achieve a fast 10 Mbyte/sec programming speed by using multi level cells.
(2) World's smallest chip size in 4-Gbit flash memory
Use of a 90 nm process together with improvement of the first-generation AG-AND type flash memory source-drain*4structure have made it possible to achieve the ultra small memory cell area of 0.016 μm2 .
It results in the world's smallest chip size in currently commercially developed 4-Gbit flash memory devices. Compared to our 1-Gbit flash memory device, the total chip area of the new 4-Gbit flash chips is nearly two-thirds smaller on a per-Gbit basis.
* Improvement of source-drain structure:
A new structure has been used in which the source and drain of a memory cell transistor are formed as an inversion layer *5 that appears in the silicon substrate when a voltage is applied to the AG. With conventional diffusion layer*6 formation, there was a tendency for the source and drain to spread laterally, but as the inversion layer is formed only in the extremely shallow region of the substrate just beneath the AG, it has become possible to reduce the memory cell area.
(3) Support for power-on read function (2-Kbyte size)
When the system is powered on, up to 2 Kbytes of data can be read by controlling two control lines (the /CE pin and /RE pin) without command or address input.
(4) Cache program function during programming operation, and programming data input function during erase operation
A function is provided that performs cache programming of the next 2 Kbytes of data a maximum of two times (4 Kbytes) while the device is being programmed. This makes it easier for the system to allocate bus operation to another task.
A function is also provided that performs one-time input of up to the next 2 Kbytes of data while the device is being erased.
(5) NAND interface
The R1FV04G13R and R1FV04G14R are compatible with NAND type flash memory at the command levels, enabling their use in systems currently employing NAND type flash memory with a minimum of software modification.
The power supply voltage is 3.3 V, and the package used is a 48-pin TSOP type-1 of the same size as the 1-Gbit AG-AND type flash memory package.
Future plans include the development of a controller for the R1FV04G13R and R1FV04G14R, and development toward use in high-speed flash cards, as well as development of a 2-Gbit AG-AND type flash memory cut product and 1.8 V low-voltage product using the new memory cells.
There are also plans to develop a large-capacity 8-Gbit product incorporating two stacked 4-Gbit AG-AND type flash memories in a new type of package (WFLGA: Very-Very Fine pitch Land Grid Array) allowing high-density mounting in December 2004.
Explore further: Samsung delays Tizen smartphone sales launch