Breakthrough results on directed self-assembly reported

At next week's SPIE advanced lithography conference, to be held in San Jose, Calif., Feb. 22-26, imec will present breakthrough results on Directed Self-Assembly (DSA) process development. Together with semiconductor equipment supplier Tokyo Electron and Merck, a leading chemical and pharmaceutical company that acquired AZ Electronic Materials in May 2014, imec has significantly improved DSA defectivity in the past year, approaching single-digit values.

Additionally, the partners have developed a DSA solution for a via patterning process compatible with the 7nm technology node. Furthermore, imec has developed a new chemo-epitaxy flow for 30nm and 45nm pitch hexagonal holes patterning using a single 193nm immersion exposure, envisioning DSA patterning for the storage-node for DRAM applications.

Reducing defectivity in DSA and improving patterning reliability is one of the main roadblocks to creating an industrially-viable DSA patterning process to push 193nm immersion litho beyond its current limits. Imec and its partners, Merck and Tokyo Electron, have made significant progress on this aspect, achieving best-in-class defectivity values of 24 defects/cm².

"Over the past few years, we have realized a reduction of DSA defectivity by a factor 10 every six months," stated An Steegen, senior vice president of process technologies at imec. "Together, with Merck and Tokyo Electron, providing state-of-the-art DSA materials and processing equipment, we are looking ahead at two different promising DSA processes that will further improve defectivity values in the coming months. Our processes show the potential to achieve single-digit defectivity values in the near future without any technical roadblocks lying ahead."

Imec, Merck and Tokyo Electron also achieved breakthroughs in two other barriers in the development of DSA patterning solutions. First, decomposition of an N7 compatible via layer was achieved. This required a novel templated DSA process with polystyrene (PS)-wetting sidewalls of the template pre-pattern. This process allows to significantly reduce the critical dimension (CD) of the template, in comparison to using the conventional a polymethylmetacrylate (PMMA)-wetting scheme. Second, an etch process has been developed to transfer the small vias (~15nm CD) into the underlying hard mask with excellent open hole rate.

Furthermore, imec has developed a new chemo-epitaxy flow for patterning of highly dense 45nm pitch hexagonal hole arrays. The process paves the way to single patterning 193nm immersion lithography in DRAM applications. Cost is crucial in standalone memory, and DRAM scaling will heavily rely on advanced patterning techniques enabling ≤ 45nm storage node pitch with a minimal number of steps for D14 and beyond.

"In today's consolidating semiconductor landscape, equipment and material suppliers are playing a key role in tackling the scaling challenges and accelerating technology advancements. Our progress on DSA process development is a testament to this, and the result of a deeply concentrated collaboration with Tokyo Electron and Merck, providing the advanced process tooling and materials knowledge paramount to achieve these breakthroughs." added Steegen. "As an answer to the evolutions in the industry, we are setting up a supplier hub, aiming to offer a neutral, open innovation R&D platform that closely involves suppliers at an early process step and module development stage and allows for efficient cost sharing, minimized risk and optimized return on investment for all in the semiconductor ecosystem. Following recent announcements concerning imec's equipment supplier hub, which has already resulted in research acceleration, we are now increasing our efforts to build a material supplier hub, which will be a focus in 2015."