Reliable 3-D memories from silicon oxide and graphene: Visionary transparent memory a step closer to reality

Oct 02, 2012
Using graphene as crossbar terminals, Rice University researchers are following through on groundbreaking research that shows silicon oxide, one of the most common materials on Earth, can be used as a reliable computer memory. The memories are flexible, transparent and can be built in 3-D configurations. Credit: Jun Yao, Rice University

(Phys.org)—Researchers at Rice University are designing transparent, two-terminal, three-dimensional computer memories on flexible sheets that show promise for electronics and sophisticated heads-up displays.

The technique based on the switching properties of , a breakthrough discovery by Rice in 2008, was reported today in the online journal Nature Communications.

The Rice team led by chemist James Tour and physicist Douglas Natelson is making highly transparent, nonvolatile resistive based on the revelation that silicon oxide itself can be a switch. A voltage run across a of silicon oxide strips away from a channel 5 wide, turning it into conductive metallic silicon. With lower voltages, the channel can then be broken and repaired repeatedly, over thousands of cycles.

That channel can be read as a "1" or a "0," which is a switch, the basic unit of computer memories. At 5 nm, it shows promise to extend Moore's Law, which predicted will double in power every two years. Current state-of-the-art electronics are made with 22 nm circuits.

The research by Tour, Rice's T.T. and W.F. Chao Chair in Chemistry as well as a professor of mechanical engineering and and of computer science; lead author Jun Yao, a former graduate student at Rice and now a post-doctoral researcher at Harvard; Jian Lin, a Rice postdoctoral researcher, and their colleagues details memories that are 95 percent transparent, made of silicon oxide and crossbar graphene terminals on flexible plastic.

This is a flexible, transparent memory chip created by researchers at Rice University. Credit: Tour Lab, Rice University

The Rice lab is making its devices with a working yield of about 80 percent, "which is pretty good for a non-industrial lab," Tour said. "When you get these ideas into industries' hands, they really sharpen it up from there."

Manufacturers who have been able to fit millions of bits on small devices like now find themselves bumping against the physical limits of their current architectures, which require three terminals for each bit.

But the Rice unit, requiring only two terminals, makes it far less complicated. It means arrays of two-terminal memories can be stacked in three-dimensional configurations, vastly increasing the amount of information a memory chip might hold. Tour said his lab has also seen promise for making multi-state memories that would further increase their capacity.

Yao's discovery followed work at Rice on graphitic-based memories in which researchers saw strips of graphite on a silicon oxide substrate break and heal when voltage was applied. Yao suspected the underlying silicon oxide was actually responsible, and he struggled to convince his lab colleagues. "Jun quietly continued his work and stacked up evidence, eventually building a working device with no graphite," Tour said. "And still, others said, 'Oh, it was exogenous carbon in the system that did it!' Then he built it with no exposure to carbon on the chip."

Yao's paper detailing the silicon oxide mechanism appeared in Nature's Scientific Reports in January.

His revelation became the basis for the next-generation memories being designed in Tour's lab, where the team is building memories out of silicon oxides sandwiched between graphene – one-atom-thick ribbons of carbon – and attached to plastic sheets. There's not a speck of metal in the entire unit (with the exception of leads attached to the graphene electrodes).

The marriage of silicon and graphene would extend the long-recognized utility of the first and prove once and for all the value of the second, long touted as a wonder material looking for a reason to be, Tour said. He noted the devices not only show potential for radiation-hardened devices – several built at Rice are now being evaluated at the International Space Station – but also withstand heat up to about 700 degrees Celsius. That means they can be mounted directly atop integrated processors with no ill effects.

The lab is also building crossbar memories with embedded diodes to better manipulate control voltages, Tour said. "We've been developing this slowly to understand the fundamental switching mechanisms," he said. "Industries have flown in and looked at it, but we're doing basic science here; we don't package things nice and pretty, so what they see looks rudimentary.

"But this is now transitioning into an applied system that could well be taken up as a future system," he said.

Explore further: The latest fashion: Graphene edges can be tailor-made

More information: Highly transparent nonvolatile resistive memory devices from silicon oxide and graphene, www.nature.com/ncomms/journal/… full/ncomms2110.html

Related paper: In situ imaging of the conducting filament in a silicon oxide resistive switch: www.nature.com/srep/2012/12013… /full/srep00242.html

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