Researchers demonstrate initial steps toward commercial fabrication of carbon nanotubes as a successor to silicon

Oct 29, 2012

IBM scientists have demonstrated a new approach to carbon nanotechnology that opens up the path for commercial fabrication of dramatically smaller, faster and more powerful computer chips. For the first time, more than ten thousand working transistors made of nano-sized tubes of carbon have been precisely placed and tested in a single chip using standard semiconductor processes. These carbon devices are poised to replace and outperform silicon technology allowing further miniaturization of computing components and leading the way for future microelectronics.

Aided by rapid innovation over four decades, silicon microprocessor technology has continually shrunk in size and improved in performance, thereby driving the information technology revolution. Silicon transistors, tiny switches that carry information on a chip, have been made smaller year after year, but they are approaching a point of physical limitation. Their increasingly small dimensions, now reaching the , will prohibit any gains in performance due to the nature of silicon and the laws of physics. Within a few more generations, classical scaling and shrinkage will no longer yield the sizable benefits of lower power, lower cost and higher speed processors that the industry has become accustomed to.

nanotubes represent a new class of whose electrical properties are more attractive than silicon, particularly for building nanoscale transistor devices that are a few tens of atoms across. Electrons in carbon transistors can move easier than in silicon-based devices allowing for quicker transport of data. The nanotubes are also ideally shaped for transistors at the , an advantage over silicon. These qualities are among the reasons to replace the traditional with carbon – and coupled with new architectures – will allow computing innovation on a miniature scale for the future.

The approach developed at IBM labs paves the way for circuit fabrication with large numbers of carbon nanotube transistors at predetermined substrate positions. The ability to isolate semiconducting nanotubes and place a high density of carbon devices on a wafer is crucial to assess their suitability for a technology – eventually more than one billion transistors will be needed for future integration into commercial chips. Until now, scientists have been able to place at most a few hundred carbon nanotube devices at a time, not nearly enough to address key issues for commercial applications.

"Carbon nanotubes, borne out of chemistry, have largely been laboratory curiosities as far as microelectronic applications are concerned. We are attempting the first steps towards a technology by fabricating carbon nanotube transistors within a conventional wafer fabrication infrastructure," said Supratik Guha, Director of Physical Sciences at IBM Research. "The motivation to work on carbon nanotube transistors is that at extremely small nanoscale dimensions, they outperform transistors made from any other material. However, there are challenges to address such as ultra high purity of the carbon nanotubes and deliberate placement at the nanoscale. We have been making significant strides in both."

Originally studied for the physics that arises from their atomic dimensions and shapes, carbon nanotubes are being explored by scientists worldwide in applications that span integrated circuits, energy storage and conversion, biomedical sensing and DNA sequencing.

This achievement was published today in the peer-reviewed journal Nature Nanotechnology.

The Road to Carbon

Carbon, a readily available basic element from which crystals as hard as diamonds and as soft as the "lead" in a pencil are made, has wide-ranging IT applications.

Carbon nanotubes are single atomic sheets of carbon rolled up into a tube. The carbon nanotube forms the core of a transistor device that will work in a fashion similar to the current silicon transistor, but will be better performing. They could be used to replace the transistors in chips that power our data-crunching servers, high performing computers and ultra fast smart phones.

Earlier this year, IBM researchers demonstrated carbon nanotube transistors can operate as excellent switches at molecular dimensions of less than ten nanometers – the equivalent to 10,000 times thinner than a strand of human hair and less than half the size of the leading . Comprehensive modeling of the electronic circuits suggests that about a five to ten times improvement in performance compared to silicon circuits is possible.

There are practical challenges for carbon nanotubes to become a commercial technology notably, as mentioned earlier, due to the purity and placement of the devices. Carbon nanotubes naturally come as a mix of metallic and semiconducting species and need to be placed perfectly on the wafer surface to make electronic circuits. For device operation, only the semiconducting kind of tubes is useful which requires essentially complete removal of the metallic ones to prevent errors in circuits. Also, for large scale integration to happen, it is critical to be able to control the alignment and the location of carbon nanotube devices on a substrate.

To overcome these barriers, IBM researchers developed a novel method based on ion-exchange chemistry that allows precise and controlled placement of aligned carbon nanotubes on a substrate at a high density – two orders of magnitude greater than previous experiments, enabling the controlled placement of individual nanotubes with a density of about a billion per square centimeter.

The process starts with carbon nanotubes mixed with a surfactant, a kind of soap that makes them soluble in water. A substrate is comprised of two oxides with trenches made of chemically-modified hafnium oxide (HfO2) and the rest of silicon oxide (SiO2). The substrate gets immersed in the solution and the nanotubes attach via a chemical bond to the HfO2 regions while the rest of the surface remains clean.

By combining chemistry, processing and engineering expertise, IBM researchers are able to fabricate more than ten thousand transistors on a single chip.

Furthermore, rapid testing of thousands of devices is possible using high volume characterization tools due to compatibility to standard commercial processes.

As this new placement technique can be readily implemented, involving common chemicals and existing semiconductor fabrication, it will allow the industry to work with carbon nanotubes at a greater scale and deliver further innovation for carbon electronics.

Explore further: Protons fuel graphene prospects

More information:… 57631852280328/show/

Related Stories

High Value Semiconducting Carbon Nanotubes

Jul 12, 2004

A simple technique has been developed for producing high value semiconducting carbon nanotubes from samples of single and multi walled carbon nanotubes. The Oxford Invention is a technique for purifying samp ...

IBM introduces new graphene transistor

Apr 11, 2011

( -- In a report published in Nature, Yu-ming Lin and Phaedon Avoris, IBM researchers, have announced the development of a new graphene transistor which is smaller and faster than the one they i ...

Recommended for you

Protons fuel graphene prospects

Nov 26, 2014

Graphene, impermeable to all gases and liquids, can easily allow protons to pass through it, University of Manchester researchers have found.

Cooling with the coldest matter in the world

Nov 24, 2014

Physicists at the University of Basel have developed a new cooling technique for mechanical quantum systems. Using an ultracold atomic gas, the vibrations of a membrane were cooled down to less than 1 degree ...

Magnetic fields and lasers elicit graphene secret

Nov 24, 2014

Scientists at the Helmholtz-Zentrum Dresden-Rossendorf (HZDR) have studied the dynamics of electrons from the "wonder material" graphene in a magnetic field for the first time. This led to the discovery of ...

User comments : 1

Adjust slider to filter visible comments by rank

Display comments: newest first

not rated yet Oct 29, 2012
Man, it would be awesome if, while testing this technology, they re-vamped old architectures as stepping stones. "Well, we can only get good yield around 20 million transistors at this point.. so here's a 23 GHz PowerII² with 64-bit PAE"

Please sign in to add a comment. Registration is free, and takes less than a minute. Read more

Click here to reset your password.
Sign in to get notified via email when new comments are made.