Engineers propose method to eliminate wasted energy in computer processors

Mar 08, 2012

In today's computer processors, much of the power put into running the processor is being wasted.

A research team at Case Western Reserve University came up with a novel idea called fine-grained gating, which saves power and money in a couple of ways: less energy would be used, and less heat produced.

"Using less power produces less heat. Less heat means less cooling is needed," said Swarup Bhunia, professor of electrical engineering and science and an author of the research. "That can avoid the need for a big fan to cool off the processor, which saves a lot of money."

Processors are used in a variety of products, from computers to cell phones. Operational costs could be cut by more than one-third, the researchers say.

Bhunia, PhD student Lei Wang and PhD alumni Somnath Paul, whose work was funded by the Intel Corporation; presented their idea at the 25th International Conference on VLSI (Very-Large-Scale Integration) Design.

They received the award for best paper at the conference, held in Hyderabad, India Jan 7-11.

Bhunia explained that two parts of a processor consume power: the datapath and memory. The datapath performs computations and takes control decisions, while memory stores data.

The waste is built-in. Computing rarely requires everything that a processor is capable of all the time, but all of the processor is fully powered just the same.

For example, while the processor might not always be doing addition, the component that performs addition is still being powered.

One attempt to improve in processors is through something called coarse gating. It switches off an entire block of the processor that is not being used.

In the previous example, the coarse gating solution would be to just simply turn off the addition block when it is not doing addition.

The problem with this method is that most of the time, some part of every component is being used in a processor. Finding an entire block that is not being used at a given time is tough.

The Case Western Reserve team's fine-grained gating idea is to shut off only the parts of a component that are not being used at the time. While the addition component needs to be capable of adding extremely large numbers, it rarely needs to actually add large numbers. The processor might be using the addition block constantly, but the parts needed to add large numbers can be turned off most of the time.

Memory works the same way. A processor needs to be capable of storing large numbers, but seldom actually stores them.

This may not seem like much, but add everything up and it makes a big difference. The team calculated that the total power savings for a typical in a high-performance system, such as a desktop computer, would be about 40%.

Bhunia explained that fine gating can't be applied to current processors, but could be used by companies to build next generation processors.

This new method does not only help corporations though. With fine-grained gating, a smart phone battery that lasted eight hours could now more than 11.

That's three more hours of Angry Birds and Words with Friends, which is a win for everyone.

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User comments : 9

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5 / 5 (2) Mar 08, 2012
Having just heard this idea, how long it would take Intel to bring it to market?
not rated yet Mar 08, 2012
2-3 years
5 / 5 (3) Mar 08, 2012
2-3 years

"Bhunia explained that fine gating can't be applied to current processors, but could be used by companies to build next generation processors."
The next generation of processors, and associated architecture, still need to be developed. I say 3-5 years.
5 / 5 (2) Mar 08, 2012
Great idea but here is a simpler one that doesn't require processor re-design: Slap a heat-to-electricity conversion module on top of every processor and use it to trickle charge the battery. Simple, and it would do the same thing... recover some of that wasted heat and ultimately save on energy use.
5 / 5 (2) Mar 08, 2012
saves power... ...or creates more room for overclocking
5 / 5 (2) Mar 08, 2012
I don't understand what's new here, we've been using fine grained clock gating got many years.
Clock gating alone is indequate since significant power is consumed both in the gates and interconnect, and gating unused parts of the data-path is also common practice.
there are 2 main problems that have to be overcome and this doesn't address either of them.
first clock / signal gating requires additional gates which increase delays and consume power, so the power savings have to be worth inserting the gates.
secondly inserting gates into clock trees complicates clock tree balancing and these also require additional control logic to enable clocks during test.
The real issue is the complexity of design with fine grained clock gating, particularly for clock tree balancing and for test, these simply require better tools.
The real savings come from architectural design to minimize toggling without additional complex clock / signal gating.
5 / 5 (1) Mar 09, 2012
Very interesting approach. It seems they are not after clock gating. Instead they apply power gating to the unused part of the computing units such as the ALU and the memory. They seem to exploit data width (large or small) which is smart.
5 / 5 (5) Mar 09, 2012
I did this several years ago in low power GPS chipset design.
It's not a new idea, actually we went a lot futher by architecting the data processing to minimize toggling and using this to specifically create an architecture that allows more efficient gating for part of the datapath that is not required in real time.
5 / 5 (3) Mar 10, 2012
Based on my experience power gating for a general-purpose processor is different ball game. The nature of data is very different from that in specific applications. Looks like the work has addressed some important challenges. Well done!
Mar 14, 2012
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