A faster, cheaper method for making transistors and chips

September 26, 2011 By Laure-Anne Pessina

A faster, cheaper method for making transistors and chips

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Credit: 2011 EPFL

(PhysOrg.com) -- It may soon be possible manufacture the miniscule structures that make up transistors and silicon chips rapidly and inexpensively. Swiss scientists are currently investigating the use of dynamic stencil lithography, a recent but not yet perfected method, for creating nanostructures.

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Faster, less expensive, and better. These are the advantages of dynamic stencil , a new way of fabricating , such as the on and .

The principle of the “stencil” technique for making structures at the nanometer scale (a millionth of a millimeter) is simple: a substrate – a Silicon (Si) wafer or flexible plastics - is placed in an evaporator. On top of it stands a stencil with openings, called apertures, about 100-200 nanometers in size. During the metal evaporation, the stencil acts like a mask, and only the metal that passes through the apertures lands on the substrate. It is thus possible to locally deposit metal on the substrate in a very specific pattern. This precision is essential for the transistors or other electronic components made up of these structures to function properly. “Take a piece of paper, cut a circle out of the middle. Put the rest of the paper against the wall, spray the whole thing with paint, and then remove the stencil. You have a nice circle. This is essentially the principle we’re using,” says Veronica Savu, who works in EPFL’s Microsystems Laboratory, led by Professor Juergen Brugger. “Using stencils to make something isn’t new, she continues. But to be able to do it at such a tiny scale is a real scientific challenge.”

A faster, cheaper method for making transistors and chips
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And Savu has already taken on the challenge. Her research was highlighted on the cover of the scientific journal Nanoscale this summer. She has also recently won a grant from the Swiss National Science Foundation to continue her work. She is not satisfied with lithography that uses a static stencil, such as was described above, because it imposes several limitations; obtaining different patterns from a single stencil is impossible, for example. She’s interested in dynamic stencil lithography (DSL), a novel process that enables custom designs using the same stencil.

“With a single aperture, our stencil can be moved during metal evaporation, and can draw several different two-dimensional patterns in a single operation, such as a square, a circle, a line or a cross. It’s like writing a text with a pencil,” she explains. “We have also proven that it is possible to use this method on a 100 mm-diameter substrate, the standard size used in industry.” Up to this point, no one has managed to do everything that’s needed to apply DSL at nanoscale in the real world. “We knew about DSL, about sub-micrometer size stencil openings, and about the use of stencils on industrial-size silicon samples. But nobody had yet been able to bring all those elements together in a single method.”

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Static or dynamic stencil lithography could thus eventually be used in industry, replacing the traditional so-called “resist-based” nanolithography methods. Those are complicated and expensive processes. “The use of stencils in the static mode represents a democratization of nanolithography – no need for expensive machinery, just a stencil and an evaporator,” says Professor Brugger.

“Now, We are going to collaborate with the Nanoscience Center at the University of Basel to do tests that are needed to prove a real application of dynamic stencil lithography,” Veronica Savu explains. “The goal is to eventually make functional transistors, possibly using graphene or nanowires, like we’ve already done with static stencil lithography.”

More information: Publication: 100 mm dynamic stencils pattern sub-micrometre structures

Provided by Ecole Polytechnique Federale de Lausanne

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nicknick
Sep 26, 2011

Rank: 5 / 5 (1)
100 to 200nms in size: Intel is starting commercially with 22 nms and is readying 14nm production for end of 2013. I am afraid this stencil technique will not be able to develop fast enough to ever compete with EUV and maskless (Mapper) upcoming litho technology.
that_guy
Sep 26, 2011

Rank: 5 / 5 (1)
I highly doubt that this technology will ever reach high technology/consumer level discrete computing. (Like replacing cellphone processors or computer CPUs.)

However, if they can consistently re-use the stencil without build up resulting from the process, or damage to the stencil, there are plenty of mid and low level computing purposes that this could potentially impact.

Think about car processors, dryers, refrigerators, appliances, all are getting some kind of processor these days. It also sounds like this may be more flexible to changes in design and material than traditional lithography.
gwrede
Sep 27, 2011

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Like the article said, they've just begun. The method is not perfected at all at this stage.
antonima
Sep 27, 2011

Rank: 5 / 5 (1)

Think about car processors, dryers, refrigerators, appliances, all are getting some kind of processor these days. It also sounds like this may be more flexible to changes in design and material than traditional lithography.


I agree, it seems like one can almost decide what the stencil will do in real time. I think this kind of technology may be really useful for extremely specialized jobs which for instance produce only several custom-made chips. Rapid prototyping etc.

Not that I know anything about chip design ;)
Rank 4.6 /5 (9 votes)
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