Imec processes first power devices on 200mm CMOS-compatible GaN-on-Si

May 26, 2011
Imec processes first power devices on 200mm CMOS-compatible GaN-on-Si
Imec processes first power devices on 200mm CMOS-compatible GaN-on-Si

(PhysOrg.com) -- Imec and its partners in the GaN industrial affiliation program (IIAP) have produced device-quality wafers with GaN/AlGaN layers on 200mm silicon wafers.

With these wafers, functional GaN MISHEMTs were processed using standard CMOS tools. The used processes are compatible with the strict contamination rules in a standard CMOS processing line (e.g. no use of gold). These first GaN devices on 200mm wafers are an important milestone on the path to cost-effective production of power devices in high-productivity 200mm fabs.

GaN is a promising material for next-generation power devices with a performance beyond what is possible with . Imec has recently succeeded in producing 200mm GaN-on-Si wafers with crack-free surfaces and a bow of less than 50µm. The wafers were made using an advanced MOCVD system from Applied Materials. The ability to use 200mm wafers is an important milestone, because it brings processing in reach of regular high-productivity 200mm fabs, allowing for an important cost reduction compared to processing smaller wafers on dedicated processing lines.

A second prerequisite for cost-effective processing, next to the size, is that power devices can be fabricated with processes that are compatible with standard CMOS processes and tools. Imec proved this by processing its GaN-on-Si wafers using standard CMOS tools, yielding functional GaN MISHEMTs (metal-insulator-semiconductor HEMT). All equipment was verified for its capability to handle the wafers, and required only minimal adjustments in software and hardware. Conventionally, is used for ohmic contacts and gate structures in power devices, but it makes GaN processing incompatible with conventional CMOS processing. To overcome this, based the ohmic contact formation on an Au-free metallization system, and modified the Schottky gate to a gate dielectric based gold-free metal-insulator-semiconductor (MIS) structure. This introduction of the MISHEMT structure had the added advantage of reducing the high leakage current of conventional HEMTs.

Explore further: New technology reduces size of spinal stimulator implants

add to favorites email to friend print save as pdf

Related Stories

Recommended for you

German study supports free "Super WiFi"

4 minutes ago

The need for the wireless transfer of data will increase significantly in the coming years. Scientists at the Karlsruhe Institute of Technology (KIT) therefore propose to turn some of the TV frequencies that ...

Scientist develops uncrackable code for nuclear weapons

24 minutes ago

Mark Hart, a scientist and engineer in Lawrence Livermore National Laboratory's (LLNL) Defense Technologies Division, has been awarded the 2015 Surety Transformation Initiative (STI) Award from the National ...

Self-driving cars could be the answer to congested roads

27 minutes ago

If cars with drivers still suffer under gridlock conditions on roads, how will driverless cars fare any better? With greater computerisation and network awareness, driverless cars may be the answer to growing ...

Robots take over inspection of ballast tanks on ships

1 hour ago

A new robot for inspecting ballast water tanks on board ships is being developed by a Dutch-German partnership including the University of Twente. The robot is able to move independently along rails built ...

User comments : 0

Please sign in to add a comment. Registration is free, and takes less than a minute. Read more

Click here to reset your password.
Sign in to get notified via email when new comments are made.