New hardware boosts communication speed on multi-core chips

Jan 31, 2011

Computer engineers at North Carolina State University have developed hardware that allows programs to operate more efficiently by significantly boosting the speed at which the "cores" on a computer chip communicate with each other.

The core, or , is the brain of a computer chip; most chips currently contain between four and eight cores. In order to perform a task more quickly using multiple cores on a single chip, those cores need to communicate with each other. But there are no direct ways for cores to communicate. Instead, one core sends data to memory and another core retrieves it using algorithms.

"Our technology is more efficient because it provides a single instruction to send data to another core, which is six times faster than the best state-of-the-art software we could find," says Dr. James Tuck, an assistant professor of electrical and at NC State and co-author of a paper describing the research. Tuck explains that the technology, called HAQu, is "not designed to communicate data on its own, but is hardware that expedites data-sharing using existing data paths on a computer chip." Because HAQu uses these existing data paths, the research team compared it to software communication tools – even though it is a piece of hardware.

HAQu is also more energy efficient. "It actually consumes more power when operating but, because it runs so much more quickly, the overall energy consumption of the chip actually decreases," Tuck says.

The next step for the research team is to incorporate the hardware into a prototype system to demonstrate its utility in a complex software environment.

Explore further: Chameleon: Cloud computing for computer science

More information: The paper, "HAQu: Hardware-Accelerated Queueing for Fine-Grained Threading on a Chip Multiprocessor," is co-authored by Tuck, NC State Ph.D. students Sanghoon Lee and Devesh Tiwari, and Dr. Yan Solihin, an associate professor of electrical and computer engineering at NC State. The paper will be presented Feb. 14 at the International Symposium on High-Performance Computer Architecture in San Antonio, Texas. The research was funded, in part, by the National Science Foundation.

Related Stories

New software design technique allows programs to run faster

Apr 05, 2010

(PhysOrg.com) -- Researchers at North Carolina State University have developed a new approach to software development that will allow common computer programs to run up to 20 percent faster and possibly incorporate new security ...

Intel's single-chip cloud computer

Feb 11, 2010

(PhysOrg.com) -- Intel Labs has recently shown off a 48-core prototype chip it calls a "single-chip cloud computer" or SCC.

AMD Planning 16-Core Server Chip For 2011 Release

Apr 27, 2009

(PhysOrg.com) -- AMD is in the process of designing a server chip with up to 16-cores. Code named Interlagos, the server chip will contain between 12 and 16 cores and will be available in 2011.

'Dark silicon' to improve smartphone battery life

Sep 01, 2010

(PhysOrg.com) -- A new smartphone chip prototype under development at the University of California, San Diego will improve smartphone efficiency by making use of "dark silicon" - the underused transistors ...

Recommended for you

Chameleon: Cloud computing for computer science

Aug 26, 2014

Cloud computing has changed the way we work, the way we communicate online, even the way we relax at night with a movie. But even as "the cloud" starts to cross over into popular parlance, the full potential ...

User comments : 2

Adjust slider to filter visible comments by rank

Display comments: newest first

semmsterr
not rated yet Jan 31, 2011
Here's to hoping this goes into production soon. I want to upgrade, but not before this goes public!
Parsec
not rated yet Jan 31, 2011
Overall thru-put increases using this technique will still be modest. The basic problem of using multi-cores efficiently with existing software is the actual bottleneck.