European Union aims to increase electronic efficiency and eliminate power consumption

Coordinated by Ecole Polytechnique Federale de Lausanne (EPFL), Project Steeper includes leading corporate research organizations IBM Research - Zurich, Infineon and GLOBALFOUNDRIES, large research institutes CEA-LETI and Forschungszentrum Jülich, academic partners, University of Bologna, University of Dortmund, University of Udine and the University of Pisa and the managerial support of SCIPROM.

Scientists collaborating on the project will apply their expertise and research to tunnel field effect transistors (TFETs) and semiconducting nanowires to improve the efficient use of energy in electronics. To explain the challenge, consider a leaky water faucet — even after closing the valve as far as possible water continues to drip — this is similar to today’s transistor, in that energy is constantly “leaking” or being lost or wasted in the off-state. In Steeper, scientists not only hope to contain the leak by using a new method to close the valve or gate of the transistor more tightly, but also open and close the gate for maximum current flow with less turns, i.e. less voltage for maximum efficiency.

According to the International Energy Agency (IEA), electronic devices currently account for 15 percent of household electricity consumption, and energy consumed by information and communications technologies as well as consumer electronics will double by 2022 and triple by 2030 to 1,700 Terawatt hours — this is equal to entire total residential electricity consumption of the US and Japan in 2009.

Particularly wasteful is the enormous amount of standby consumption. In the European Union it is estimated that standby power already accounts for about 10% of the electricity use in homes and offices of the member States. By 2020 it is expected that electricity consumption in standby/off-mode will rise to 49 terrawatt hours per year — nearly equivalent to the annual electricity consumption for Austria, Czech Republic and Portugal combined.

“Our vision is to share this research to enable manufacturers to build the Holy Grail in electronics, a computer that utilizes negligible energy when it’s in sleep mode, which we call the zero-watt PC,” said Prof. Adrian M. Ionescu, Nanolab, Ecole Polytechnique Fédérale de Lausanne, who is coordinating the project. With the support of the European Commission’s 7th Framework Program (FP7), project Steeper scientists will explore novel nanoscale building blocks for computer chips that aim to reduce the operating voltage to less than 0.5 Volt, thus reducing their power consumption by one order of magnitude.

“Power dissipation has become one of the major challenges for today’s electronics, particularly as the number of devices used by businesses and consumers multiplies globally,” said Dr. Heike Riel, who leads the nanoscale electronics group at IBM Research - Zurich. “By applying our collective research in TFETs with semiconducting nanowires we aim to significantly reduce the power consumption of the basic building blocks of integrated circuits affecting the smallest consumer electronics to massive, supercomputers.”

The supporting science

The development of novel devices, such as the steep slope transistors, from which the project gets its name, can provide a much more abrupt transition between the off and on states when compared with the current 60 mV/decade limit of metal–oxide–semiconductor field-effect transistor (MOSFET) at room temperature.

This simultaneously allows for reducing the sub-threshold leakage and lowering the voltage operation. The development of energy-efficient steep sub-threshold slope transistors that can operate at sub-0.5 V operation domain will be a critical factor in the success of the project.

To achieve this, scientists will study the development of so-called TFETs based on silicon (Si), silicon-germanium (SiGe) and III-V semiconducting nanowires. Nanowires are cylindrical structures measuring only a few nanometers (nm) in diameter, which allow optimum electrostatic control of the transistor channel. In a TFET quantum mechanical band-to-band tunneling is exploited to switch on the device and thus achieve a steeper turn-on characteristics compared to conventional MOSFETs.

Project Steeper will evaluate the physical and practical limits of boosting the performance of TFETs with III-V nanowires, and the resulting advantages for future energy efficient digital circuits.

The project started in June 2010 and will continue for 36 months.

More information: Electricity Consumption and Efficiency Trends in European Union, Status Report 2009, JRC-IE

Provided by IBM