Using Nanotubes in Computer Chips

September 10, 2009

(PhysOrg.com) -- MIT materials scientists have developed a new technique for growing carbon nanotubes that could replace the vertical wires in chips, permitting denser packing of circuits.

Researchers in the lab of MIT materials science professor Carl V. Thompson grew dense forests of crystalline carbon nanotubes on a metal surface at temperatures close to those characteristic of computer chip manufacturing. Unlike previous attempts to do the same thing, the researchers' technique relies entirely on processes already common in the .

The researchers also showed that the crucial step in their procedure was to preheat the hydrocarbon gas from which the nanotubes form, before exposing the metal surface to it.

The transistors in computer chips are traditionally connected by tiny copper wires. But as chip circuitry shrinks and the wires become thinner, their conductivity suffers and they become more likely to fail. A simple enough manufacturing process could enable carbon nanotubes to replace the vertical wires in chips, permitting denser packing of circuits.

In a , the researchers vaporized the metals tantalum and iron, which settled in layers on a silicon wafer. Then they placed the coated wafer at one end of a quartz tube, which was inserted into a furnace. At the wafer's end of the tube, the furnace temperature was 475 degrees C; but at the opposite end, the temperature varied. The researchers pumped ethylene gas into the tube from the end opposite the wafer. When the temperature at that end approached 800 degrees, the ethylene decomposed, and the iron on the wafer catalyzed the formation of carbon nanotubes.

The researchers are trying to determine whether different combinations of metals and hydrocarbon gases can lower the catalytic temperature even further and improve the quality of the nanotubes.

More information: "Low Temperature Synthesis of Vertically Aligned Carbon Nanotubes with Electrical Contact to Metallic Substrates Enabled by Thermal Decomposition of the Carbon Feedstock," Gilbert Nessim, Carl V. Thompson et al, Nano Letters, Aug. 31, 2009

Provided by Massachusetts Institute of Technology (news : web)

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Thex1138
not rated yet Sep 11, 2009
Hopefully this will lead to multi-layered chips, 3D.
poi
not rated yet Sep 11, 2009
good prospects, hope they get further funding and for the chip manufacturers to take on it. otherwise, it's another long wait.
IanVand
not rated yet Sep 11, 2009
The problem with integrating carbon nanotube technology with the current silicon manufacturing technology is the temperature required to form carbon nanotubes. If combined, the heat from the carbon nanotube process would destroy the functionality of the silicon transistors (by spreading the dopants in the N and P regions of transistors).

The process described in this paper may still be too hot to intregrate with current technologies, but investigating other catalysts for lowering the heat of producing nanotubes is a foot in the right direction.

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