Siemens researchers working in collaboration with specialists from Infineon have developed a receiver that converts Internet data from fiber-optic cables into electrical signals at breathtaking speed. At present, highly complex and expensive modules are needed for receiving such signals. In the future, components such as the Infineon chip, which is being used for the first time, will play an essential role in increasing the performance of communications networks at reasonable cost.
The Internet is becoming increasingly popular, with the global user community growing at an annual rate of twenty percent. In 2005 over a billion people were already clicking regularly into the World Wide Web. In order to prevent the dense data traffic from bringing telecommunications networks to the point of collapse in the future, operators will have to make their data routes more efficient, while minimizing the cost of doing so. Achieving this will require new cost-effective, high-tech modules.
One such module, which now exists as a prototype, is the result of the cooperative project "Demonstator for 80-Gbit/s direct receivers with electrical time division demultiplex" funded by the German Federal Ministry of Research and carried out by Siemens Corporate Technology (CT) and the Siemens Communications Group (Com) in Munich together with Infineon Technologies. This is a data receiver that processes a data volume of 107 gigabits per second on a tiny electronic chip. That is a record-breaking performance, because up until now considerably more complex and far more expensive modules have been necessary. 107 gigabits corresponds approximately to the volume of the data held on two DVDs.
Data usually travels along the high speed routes of the Internet in the form of a light signal. Before the data can be converted back into electrical signals at the destination point it must first be split optically into several signals with a lower data rate, each of which then has to be converted individually into electrical signals with photodiodes. This is necessary to enable the downstream electronic systems to process the data. However, the optical equipment needed for this splitting process is expensive. Moreover, several optoelectronic converters are also needed, which drives up the costs enormously.
The aim of the researchers was therefore to develop a chip that receives and processes the signal from the photodiode directly. The advantage is that a chip of this type can be mass-produced relatively cheaply, and complex modules made up of several components would no longer be necessary. The first products based on this prototype will be used some day at the switching centers of the large network operators where incoming data streams, such as trunk connections between large cities, are received at high speed. Here the optical signals have to be coupled out, converted into electrical signals and fed into the local copper cable network. Even the most efficient high-speed routes at the present time only carry data at a maximum of 40 gigabits per second – not even half as much as the new system recently tested for the first time.
This type of receiver system has to be able to detect the timing of the incoming high-speed data packages. This function is performed by a timing recovery system, a kind of inner clock that senses the rhythm, or in other words the pulse rate of the data stream. At data rates above 40 gigabits per second, a separate optoelectronic module is often necessary for this.
The new chip on the other hand has an internal clock on board. The compact high-performance chip was manufactured using a predecessor version of Infineon’s advanced silicon-germanium semiconductor technology “B7HF200” and measures just 1.7 by 2.5 millimeters - with terminals and housing that’s approximately the size of a cigarette pack.
“To check the viability of this integrated receiver we carried out a transmission test over a 480-km (300 mile) fiber-optic cable route together with the Heinrich Hertz Institute in Berlin,” said Dr. Rainer H. Derksen, project coordinator at Siemens Corporate Technology in Munich. This test showed that it was possible to transmit and receive data without errors. “This was the first time that the feasibility of a purely electrical 107 Gbit/s receiver for optical transmission has been proven in practice.”
A notable feature is that the receiver can be used for the future 100 Gbit/s Ethernet transmission system that telecommunications network operators are pushing ahead intensively at present. Ethernet – for the considerably slower rate of 1 Gbit/s or less – has long been an established standard for communication between computers in corporate and home networks.
Since it is a particularly flexible method of transporting data it is also of growing interest for the large transmission networks. One of the advantages is that the high speed data packages no longer travel along permanently wired circuits to the end customer, but can be transported flexibly over alternative routes. This means that in future it will be possible to bypass overloaded route sections on which data traffic is particularly heavy – and thereby increase customer satisfaction. As the cooperation team has demonstrated, its chip is already fit for use in this network.
The main achievement of the researchers was in the design of the chip. The tiny circuits inside the small silicon and germanium chip have to be able to process extremely fast data without interference with the signals. “If the circuit is wrongly dimensioned, you get defective signals,” said Derksen. Incorrectly dimendioned circuits can, for instance, reflect a signal. Then, instead of traveling through the chip, the signal starts to oscillate.
The task of the Siemens researchers was to design the entire system in which the receiver is embedded. Derksen emphasized that the performance of devices of this kind is increasing all the time, but none has thus far proved as quick as the new receiver. Theoretically the device could process the signals from 100,000 DSL users simultaneously. The researcher from Siemens CT anticipates that on the basis of the prototype the first products will be on the market in about two to three years – and they could be available at an unrivalled low price thanks to mass production of the chips.
Explore further: Twin paradox on a chip