Archive: 05/28/2004

Scaling Friction Down to the Nano/Micro Realm

An improved method for correcting nano- and micro-scale friction measurements has been developed by researchers at the National Institute of Standards and Technology (NIST). The new technique should help designers ...

dateMay 28, 2004 in
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STATS Introduces Silicon Based System-in-Package Solution

ST Assembly Test Services Ltd (STATS) developed a new technology, called chip scale module package (CSMP), which involves the fabrication of passive devices such as resistors, capacitors, inductors, filters, baluns and interconnects ...

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Samsung Develops 70-nanometer DRAM Process Technology

The industry’s first development of 70-nanometer DRAM process technology employing the CVD method Samsung Electronics announced that it has developed the industry’s first “CVD aluminum” process technology, the very lat ...

dateMay 28, 2004 in
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